A project log for Memristor Simulator for a Neural Network

Simulating the functionality of memristors using off-the-shelf parts to form a neural network crossbar array

justin-davisJustin Davis 04/24/2017 at 02:090 Comments

I know 6 memristors is not really a whole lot. I've been considering how to scale it up. I could easily add more digital pots since they are all SPI based, but the analog measuring would get complicated. I suppose I could do some analog multiplexing. I have 4 memristors per digital pot, and 12 ADC inputs, but I need 2 for each pot. So 1.5 chips with no muxes.

6 chips: 24 pots: 48 analog channel needed. So there would be 4 signals for every channel available. So I'd need 6 4:1 muxes. I can get 2 4:1 muxes in a chip, so I'd need 3 chips more. So 9 chips total would give me 24 memristors.

The only problem would be sampling time. I can only grab one sample at a time, and I have to get 48 samples and have to include time to change the muxes.

I may consider changing my approach. It may make more sense to use a separate 8-channel ADC for each digital pot. And then use an FPGA for a separate SPI bus to each ADC/pot pair. Perhaps I should figure out how many memristors I really want for a decent neural net architecture which would drive the final implementation.