Breadboard VGA from TTL and EEPROM

Details

This circuit generates a 640x480 VGA signal and renders an 160x120 16 color image in it. The resolution is limited by the memory capacity and speed. The parrot image is stored in the right EEPROM (32kB) as 4-bit "RGBI". This 150 ns grade ROM is barely fast enough to keep up with the pixel clock: in fact, technically it is slightly too slow, but it works nonetheless..

The low address byte comes from the X counter below counting from 0 to 199 (2 IC's). This counter is driven by a 25MHz clock that gets divided by 4 by a separate counter chip. The pixel ROM output includes the VGA H/V sync signals.

A 10-bit Y counter (3 IC's) enumerates the 525 VGA scan lines per frame and drives the left EEPROM (8kB). This left ROM selects the active display line by feeding into the pixel ROM's high address bits. Each line is programmed to be repeated 4 times this way. The vertical blank is programmed similarly.

The 3 control signals into the counters come from the ROMs. You can therefore say that this is a simple programmable computer with just 3 instructions: nextPixel, nextLine and nextFrame.

The pixel ROM's output is buffered by flip-flops to get stable pixels out. The 4-bit digital RGBI gets mixed with a bunch of resistors and diodes into analog RGB which then enters the VGA plug.

This project was completed in two days and included learning how to burn an EEPROM in two different ways using an Arduino: one of these ways revolves around not noticing that Vcc and GND are interchanged while debugging failing verifications, literally burning both the chip and the ZIF socket in the process. This explains the scorch marks on the left chip markings. Almost no other chips were harmed in this project.

Files

Y-CTL FF-D0 X-Q6 CLK 0.500us scanline end.png

End of scan line. 19 pixels and the last 8 "ones" of X counter bit 6 can be observed.

Portable Network Graphics (PNG) - 54.48 kB - 03/06/2017 at 22:30

Preview

Y-CTL FF-D0 CLK 6.36us hblank.png

Horizontal blank is 6.36 us or 800-640 = 160 VGA clocks.

Portable Network Graphics (PNG) - 58.04 kB - 03/06/2017 at 22:27

Preview

FF-Q5 FF-Q4 CLK 640ns HS front porch.png

Horizontal front porch is nicely ~640 ns, as it should be.

Portable Network Graphics (PNG) - 54.17 kB - 03/06/2017 at 22:25

Preview

CLK FF-D0 62ns next pixel.png

Pixel throughput at 62 ns. Much faster than the expected 150+ ns.

Portable Network Graphics (PNG) - 61.23 kB - 03/06/2017 at 22:21

Preview

IMG_2284.jpg

Logic diagram

JPEG Image - 2.12 MB - 03/05/2017 at 20:20

Preview

Components

1 × AT28C64-15 (8kB / 150ns) Memory ICs / EEPROMs

1 × AT28C256-15 (32kB / 150ns) Memory ICs / EEPROMs

6 × 74LS163 fully synchronous 4-bit counter with clear Electronic Components / Misc. Electronic Components

1 × 25.175 MHz oscillator

1 × 74LS273 8-bit flipflop / register Electronic Components / Misc. Electronic Components

Project Logs

Collapse

Discussions

Sean Conrad wrote 07/21/2019 at 21:07

The AT28C64-15 seems to have been obsoleted/discontinued, and a product search from my supplier of choice returned this as the closest replacement:

AT28C64B-15PU

Unfortunately I am not yet knowledgeable enough to know from the datasheets if it really is a good replacement, but thought you might want to know and possibly update the parts list.

Are you sure? yes | no

Enrique Phan wrote 06/12/2019 at 07:54

Hey Marcel! So happy you saw my clone on reddit! I hope you liked it. I changed the structure a little bit but your project was very useful.

Are you sure? yes | no

Dylan Brophy wrote 08/20/2017 at 06:47

Im going to try to make something like this

Are you sure? yes | no

Dylan Brophy wrote 08/21/2017 at 13:29

Hmm, I wanted to use it in a bigger project, however the compare logic that my design would need (you use EEPROM) would make the design really big. And for the larger project I don't really want to add another EEPROM, so we'll see if I actually do it :P

Are you sure? yes | no

Marcel van Kervinck wrote 03/20/2017 at 20:59

For those following/interested: the next project can change the picture by using a RAM instead of ROM. Also resolution and color depth is improved.

https://hackaday.io/project/20334-breadboard-vga-from-ttl-and-sram

The microcontroller is back, but only as a temporary measure.

Are you sure? yes | no

Ludek wrote 03/12/2017 at 12:18

Very nice project :) Nice to see non-CPU system displaying semi-good quality pictures. I didn't know that a bread-board circuit can handle as high as ~25 MHz freqs and work beautifully :) The parrot and colourfull (well, 256colours) patterns reminds me of my old DOS computer (my first PC? hmm) back in 2001 or something.

Are you sure? yes | no

Marcel van Kervinck wrote 03/11/2017 at 17:12

Two errors I fixed in this design today: The first is that the number of VGA lines was one short. It wrapped around from 523 instead of from 524. I missed this because the 120th pixel row was there of course, only a bit flatter. The other issue was that I had the polarity of the H/V pulses wrong. For this mode they should be negative.

Both are fixed by reprogramming the ROMs. I didn't bother to update any of the files here.

Apparently LCD monitors can take a lot of signal abuse.

Are you sure? yes | no

Breadboard VGA from TTL and EEPROM

Description

Details

Files