This is very simple educational 8-Bit RISC CPU and computer.
Uses only 16 logic chips, two EEPROM, and one SRAM chip, and one 555 timer.
This is much smaller then other comparable 8-Bit computer designs.
(For comparison, Ben Eater's 8-Bit computer uses about 40 logic chips.)
Uses Harvard architecture, with separate instruction and data memory.
Clock is generated by 555 timer with frequency from 1 Hz to 1000 Hz.
Although schematic will probably allow higher frequency up to 1 Mhz.
Instruction format 16 Bit, with 8 bit opcode, and 8 bit address or data.
Instructions stored in two EEPROM chips.
There is one 8-Bit SRAM chip. Address space is 8 bits.
One output 8-Bit port, and one input or bidirectional 8-Bit port.
ALU executes instructions Add and Subtract and clear accumulator.
One Accumulator 8-Bit register A.
Instructions set is very small but allows to execute short programs.
Instructions:
No-op.
Clear Accumulator A. ( zero to A)
Add operand to A and store in A.
Subtract operand from A and store to A.
Store value from A to SRAM at address N.
Input operand from input port and add to A.
Output value A to output port.
Jump conditional when Flag overflow.
Jump unconditional.
Operand of Add or Subtract instructions can be:
immediate value # from instruction EEPROM,
value from SRAM at address N,
value from input port.
value from accumulator A (add to itself).
Notes,
There is no load A
instruction. But one can use ‘Clear’ instruction,
following by
‘Add’ instruction to load value to the A accumulator.
There is only one conditional Jump instruction and flag carry.
But one can use it to test different conditions.
For example, to test if A register in not zero: Add value hex FF to A.
If flag carry is set then the value in A was not zero.
Cool. Could we have a blinky program for it?
I see from the date on the schematic that this was designed back in 2020. Do you have the schematics in an ECAD format like KiCad, EasyEDA, Eagle, etc? Would also be nice if one could simulate it using Logisim.