Here is now another time measurement device built with conventional TTL-Hardware.

Idea is to provide an understandable circuit without exotic hardware such as a CPLD.

The device works excellent and I prefer it to the measurements with Arduino-Uno.

It can measure up to 16 pulse time values a 16 Bit.

Here how it works:

The Measurement is engaged by setting EN (and nCLK) to High, Then the Channel is selected with CHSEL and an Excitation Pulse is triggered (TRIG).  

The TRIG signal resets the 74LS193 index counter adressing the Storage cells.

With a delay Monoflop CD4089 the TRIG signal is delayed to reject Signal impulses coming directly after the excitation.  

The delayed Trigger signal resets a RS-Flip flop and clock pulses are fed to the synchronous 74LS161 counters.

The negative Signal of an incoming Signal stores the acutal counter values into 4-Bit 74LS198 TTL-Rams addressed by the index counter.

The Signal pulse increments the index counter. When the counter overruns the Carry will stop the  measurement by setting the RS-Flip-Flop which disables the time measurement counters are disabled.

The counter can also be stopped by the Microcontroller by setting EN to LOW to terminate measurement when less than 16 signals are registered.

Now the Microcontroller can read out the values by decrementing the index counter with nCLK, observing BO which indicates a Zero-Transition as a LOW value.

Each counter value is read nibble by nibble addressing it with A,B. The nibble values appearing at A0..A3. Microcontroller has to invert these values because 74LS189 is inverting the values.

With a 16MHz Oscillator the position resolution is about 0.2 mm.
Instead of the 74LS161 one can use 74F161 that can be clocked with much higher frequencies.

With a 32MHz-Oscillator  a position resolution of 0.1 mm can be achieved.

However it is also possible to replace the four 74LS161 with two 8-bit counters of type 74HC590 that can cope with a clock frequency of 32MHz.

The clock signal is fed to RCK (pin 13) to both 74HC590 chips, At the first IC CCK (pin 11) and RCK are connected. For cascading the RCK of the second chip is connected with RCO (Pin 9) of the first one.
nG (pin 14) and nCCEN (pin 12) are connected to GND, whereas nCCLR (pin 10) of both chips are connected with the 2Q* pin of the Gate flip flop 47LS74.