RAD86 is an old-school, tile-based 8 bit game console.

This project is all about FUN.

If we're not having fun, we're doing it wrong.

Capabilities fit somewhere between the Sega Master System and the PC Engine.

Target Specs :

• Hitachi HD6309 CPU @ 3.6864MHz
• 8KB General purpose Static RAM
• 16KB BIOS ROM
• 32KB Video Static RAM
• 32KB-2048KB Cartridge ROM space
• 4 controller support using Mega Drive 6 buttons controllers
• Yamaha YM2203C 3 Channel, 4 operator FM + 3 channel PSG
• Custom Video Display Processor

A reasonable effort has been made to select components that were available in Japan circa 1986 but suitable modern equivalents have been used when necessary.

By the represented time period, all consoles used custom Video Display Processors (VDP), so an off the shelf solution cannot be used. The MSX2 V9938 was considered, but the single 16 color palette was no fun, so we decided to make our own VDP.

Lacking access to a foundry we selected the Altera Flex10K10LC84-3 as our programmable chip to implement the VDP. This is a 1995 low-end 5V FPGA and is therefore anachronistic, but we stick to capabilities that are well within what was achievable in 1986 with gate arrays or ASICs of the period. As a small nod to modernity we use 2/3 of the internal RAM and 1/4 of the logic to implement a simple scan doubler and VGA controller.

That leaves us with 432 LUT and 256 bytes of Block RAM for the tile engine, sounds like fun!

VDP capabilities :

• 32x30 8x8 tiles on a screen (256x240 pixels game resolution)
• Integrated scan-doubler provides 640x480 60Hz output (512x480 visible)
• Hardware-assisted horizontal and vertical scrolling
• 4x 16 color palettes from a selection of 256 (RRGGGBBS encoding)
• 64 8x8 sprites on-screen
• 16 sprites max per scanline
• 8bit control interface
• 8bit SRAM memory interface
• 9bit RGB output to a simple Resistor DAC

The current hardware platform, called the "DevKit" is the 3rd functional implementation of the design.

DevKit differs from the hypothetical "production" console by having sockets for extra RAM mapped to the CART ROM space. This RAMCART makes development easier than burning ROMs and swapping carts.

DevKit also includes a UART and built-in serial Monitor in ROM that is compatible with the NoICE debugger. 3x 20pin hardware debug headers compatible with Agilent logic analyzer termination adapters are also provided.

DevKit includes 32KB banked RAM instead of 8KB and uses a large 64KB BIOS ROM that can hold 2 FPGA bitfiles on top of the 16KB BIOS.

DevKit measures 170x170mm and is compatible with Mini-ITX PC cases.