The download software of GW1NSR-LVC4QN48 can choose the download port of FT4232, so we designed a 2xJTAG+2xUART download line using the FT4232 chip. Of course, it can also be used for xilinx download, but it needs to burn another .bin file to EEPROM, and xilinx can only use port A of FT4232.
The terminals of JTAG use 6P 1.0mm/1.25mm/2.54mm three spacing connectors, and the VREF voltage can be adaptive from 1.2V to 5V.
UART voltage is adaptive from 1.5V to 5V. C port UART can choose JTAG's A port VREF or 3.3V, and D port UART can choose JTAG's B port VREF or 3.3V. The 3P terminal also has three specifications: 1.0mm/1.25mm/2.54mm.
Kicad files and EEPROM.bin files will be uploaded to https://github.com/eleclab-rpi/FPGA_FT4232HQ_2JTAG_2UART later