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FPGA video split display board

A project log for T113/RK3506+XC6SLX drives multiple LCD screens

Use T113-S4/RK3506G2+XC6SLX25+512M DDR3 to divide the video data of framebuffer into 6 outputs from lvds. 6 displays use GW1NSR-LV4CQN48.

eleclabElecLab 08/26/2025 at 02:520 Comments

This motherboard can verify the LVDS split output of T113-S4/RK3506G2 + XC6SLX25, and 6 NGFF sockets can connect 6 1.9" GW1NSR-LV4 displays.

RTC/horn/WIFI6/USB are available, and the TypeC port can be connected to the computer to power the motherboard and UART debug.
We can use it to achieve functions similar to rgb tube clock. Of course, video decoding playback/GIF playback can also be used after inserting the core board of T113-S4.
Similarly, the Kicad file will be uploaded to github later.

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