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RK3506G2+XC6SLX25 core board

A project log for T113/RK3506+XC6SLX drives multiple LCD screens

Use T113-S4/RK3506G2+XC6SLX25+512M DDR3 to divide the video data of framebuffer into 6 outputs from lvds. 6 displays use GW1NSR-LV4CQN48.

eleclabElecLab 08/26/2025 at 03:100 Comments

The FPGA part leads to 28 pairs of LVDS lines, all of which are equilength wiring on the front and back.

RK3506G2 leads to 2x100Mbps PHY/2xUSB/SDIO/2Lanes MIPI DSI/19xRMIO/2xADC, and its 16bits DSMC/RGB24 interface is connected to FPGA. You can choose to use FPGA as a bus device or RGB 24bits video cutting.

The 7-inch MIPI DSI display verification board leads to 2x100Mbps RJ45/2xUSB/WIFI6/USB 4G/GPS module NGFF socket/MX3.0 socket (CAN/RS485/16xIO PCA9535)/6 P capacitive touch screen/speaker

We will upload the Kicad schematic, but the Kicad file of the PCB will not be open source for commercial reasons.

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