A full suite of Python-based tools, plus a fast Rust backend, for KiCad PCB routing.
Example:
python route.py kicad_files/input.kicad_pcb kicad_files/output.kicad_pcb --nets "Net*" --power-nets "*GND*" "*VCC*" "+3.3V" --power-nets-widths 0.4 0.5 0.3 --track-width 0.2 --via-size 0.4
Features:
- Grid-based A-star pathfinding with Rust acceleration (~10x faster than Python)
- Octilinear routing - Horizontal, vertical, and 45-degree diagonal moves
- Multi-layer routing with automatic via insertion
- Differential pair routing with pose-based A* and Dubins path heuristic for orientation-aware centerline routing
- Rip-up and reroute - When routing fails, automatically rips up blocking routes and retries with progressive N+1 strategy (tries 1 blocker, then 2, up to configurable max). Re-analyzes blocking tracks after each failure for better recovery. Also triggers rip-up when quick probes detect blocking early, before attempting full routes.
- Blocking analysis - Shows which previously-routed nets are blocking when routes fail
- Stub layer switching - Optimization that moves stubs to different layers to avoid vias when source/target are on different layers. Works for both differential pairs and single-ended nets. Finds compatible swap pairs (two nets that can exchange layers to help each other) or moves stubs solo when safe. Tries multiple swap options (source/source, target/target, source/target, target/source) to find valid combinations. Validates that stub endpoints won't be too close to other stubs on the destination layer.
- Batch routing with incremental obstacle caching (~7x speedup)
- Net ordering strategies - MPS (crossing conflicts with diff pairs treated as units, shorter routes first using BGA-aware distance; uses segment intersection with MST for non-BGA boards), inside-out (BGA), or original order
- MPS layer swap - When MPS detects crossing conflicts (nets in Round 2+), attempts layer swaps to eliminate same-layer crossings. Tries swapping both the conflicting Round 2 unit and Round 1 unit. Re-runs MPS after swaps to verify conflict resolution
- BGA exclusion zones - Auto-detected from footprints, prevents vias under BGAs
- Stub proximity avoidance - Penalizes routes near unrouted stubs
- Track proximity avoidance - Penalizes routes near previously routed tracks on the same layer, encouraging spread-out routing
- Vertical track alignment - Attracts tracks on different layers to stack vertically (on top of each other), consolidating routing corridors and leaving more room for through-hole vias
- Adaptive BGA setback angles - Evaluates 9 setback angles (0°, ±max/4, ±max/2, ±3max/4, ±max) and selects the one that maximizes separation from neighboring stub endpoints, improving routing success when stubs are tightly spaced. Uses 0° when clearance to the nearest stub is sufficient (≥2× spacing), only angling away when stubs are too close
- U-turn prevention - Prevents differential pair routes from making U-turns (>180° cumulative turn)
- GND via placement - Automatically places GND vias adjacent to differential pair signal vias for return current paths. The Rust router checks clearance and determines optimal placement (ahead or behind signal vias)
- Target swap optimization - For swappable nets (e.g., memory lanes), uses Hungarian algorithm to find optimal source-to-target assignments that minimize crossings. Works for both differential pairs and single-ended nets
- Schematic synchronization - When specified, updates KiCad schematic files with any pad swaps (target swaps or polarity swaps) to keep schematics in sync with PCB. Handles multi-unit symbols correctly by updating all schematic files containing the lib_symbol. Disabled by default
- Chip boundary crossing detection - Uses chip boundary "unrolling" to accurately detect route crossings for MPS ordering and target swap optimization
- Turn cost penalty - Penalizes direction changes during...
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NuclearPhoenix
Nguyen Vincent
oneohm
Pinski1
Yes this is the kind of stuff we need !