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BX-8

Homebrew 8-bit TTL CPU, generation 2 of an ongoing series toward running Linux.

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So my goal is to one day build a computer that can actually run Linux or Windows. Obviously I can't just do that, so I decided to start small and work my way up, making each CPU better than the last one until I get there. The BX-4 series was my first one, a 4-bit CPU I built in 5th grade after reading Code by Charles Petzold. The BX-8 is the second generation. For this one I read a bunch of books and datasheets on the 8085, Z80, and 6502 to see how they handled things, then designed my own instruction set from scratch. The ALU is on an FPGA and is working on real hardware, and so is the register file and program counter. Still putting the rest together. The next one after this is the APEX-16, a 16-bit pipelined CPU with an FPU. It got way too complicated to build by hand so that one is all simulation. The BX-8 is probably the last breadboard build.

The BX-8 has a custom ISA with 60+ instructions, an 8-bit data bus, a 16-bit address bus, and 128 KB of addressable ROM and RAM split between program storage a…

The BX-8 has a custom ISA with 60+ instructions, an 8-bit data bus, a 16-bit address bus, and 128 KB of addressable ROM and RAM split between program storage and external devices through memory-mapped I/O. Instructions are decoded through a ROM-based microcode unit with a 33-bit control word that directly drives every signal in the CPU, things like clocking the PC, selecting registers, enabling the ALU, controlling the stack, and picking between ROM and RAM on the bus.

There are 7 registers. A is the accumulator and the only one that feeds into the ALU, so every arithmetic and logic result comes back through A. B, C, D, and E are general purpose and also used for memory addressing. F and G form a 16-bit address pair called FG, which is used for indirect jumps, subroutine calls, and memory-mapped I/O, basically the same idea as HL on the Z80. The ALU runs on an FPGA and supports ADD, SUB, ADC, SBC, AND, OR, XOR, complement, shift left, and shift right, selected through a 3-bit control input. It sets three flags: Z for zero, C for carry, and N for negative.

The instruction set covers immediate loads, direct memory loads, a full 7x7 register to register move matrix, arithmetic with and without carry, logic operations, two types of compare and jump instructions, conditional jumps on flags, and register exchange. The hardware stack is 16 entries deep and 16 bits wide, stored as two separate 8-bit halves with independent clock signals for push and pop. It's used by CALL and RET to save and restore the program counter during subroutine calls.

The ALU, program counter, and register file are all built and running on real hardware. Everything else is still being integrated.

I have a Youtube video about this project and this is the Intro, Part 1: Program Counters, and Part 2: Registers

instr.txt

Instruction set and microcode

plain - 4.73 kB - 02/06/2026 at 22:56

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CPU_4.0.dig

Main CPU

dig - 326.08 kB - 02/06/2026 at 22:56

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ALU_V2.dig

main ALU

dig - 83.19 kB - 02/06/2026 at 22:56

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instr-data.hex

The stored hex format of the

hex - 67.56 kB - 02/06/2026 at 22:56

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Stack_FOR_MIT.dig

Stack for the CPU

dig - 22.27 kB - 02/06/2026 at 22:56

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  • ALU works!

    Bohan Xu03/15/2026 at 21:10 0 comments

    YES! The FPGA works! It didn't work because I used one of the MODE pins as a normal I/O and when I would boot it it would not boot my program. I also changed the switches to just wires because that way I wouldn't have to worry about pull-down resistors. 

    Please comment or follow! Thanks!

  • Testing ALU

    Bohan Xu03/13/2026 at 21:41 0 comments

    So the ALUI doesn't exactly work. I took the FPGA I was using and put it into a testing circuit. I'm testing it and it doesn't work. Trying to fix it hopefully I will find a solution sometime soon! If you have anything to say please comment! Thanks! Here's a picture:

  • Finished building ALU!

    Bohan Xu02/18/2026 at 01:22 2 comments

    I finally finished building the ALU part! Here's a picture. The FPGA in the middle does addition, subtraction, complement, and, or, xor, and shifts. The rest off the chips are buffers, comparaters, registers, and the A register. The eight LEDs are connected to the data bus. If you have any suggestions please comment! Thanks!

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Discussions

MCUer wrote 02/08/2026 at 15:48 point

That’s absolutely amazing for your age!

  Are you sure? yes | no

Bohan Xu wrote 02/08/2026 at 20:45 point

Thanks!

  Are you sure? yes | no

Ken Yap wrote 02/07/2026 at 21:59 point

Should be interesting. More power to you! 👍 

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