The great thing about real work (instead of uni) is that after it turns 5:30pm, you don't really need to think about work anymore. You can simply go home and have dinner. It's quite liberating not having to worry about problem sheets / assignments, and actually enjoy your evening like a normal person.

Unfortunately, I'm not a normal person, so I've spent my evenings over the past couple of weeks working hard to get some of my more annoying synthesiser ideas out of my scribbly notes and into simulation / breadboards.

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A shopping trip

There's a fantastic shop in London called Cricklewood Electronics. It sells pretty much every commonly used chip in existence, including lots of classic 40xx series logic chips, and is probably one of the last walk-in component shops in the UK, with hundreds of those little drawers behind a counter. At a time when postage from the US is extortionate due to supply chain issues, this has proved a saviour for me this week - I managed to get this selection of switch arrays, shift registers and frequency dividers for under £15. I'd highly recommend Cricklewood Electronics if you live near London and need immediate, low-volume chips. More on what these chips are for later.

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The MIDI receiver is complete - but one problem remains

At the end of the last update, I hit a roadblock as my 4N35 optocoupler (connecting my keyboard to the ESP32) struggled to keep up with the speed of MIDI messages being sent (its rise time is larger than the minimum required in the MIDI 1.0 specification).

I'm pleased to report that the replacement 6N138 optocoupler, which meets the MIDI 1.0 specifications works perfectly, and I'm able to receive Note On / Note Off messages with no issues at all, including pitch and velocity data. It hadn't crossed my mind before, but we could use the velocity data to control our VCAs later on in the signal chain.

The problem that remains is a very difficult decision that requires thinking beyond embedded programming, and more about the entire architecture of the synthesiser, described below.

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The divide-keying problem

The aforementioned problem requires a bit of introduction.

A key requirement of all clock-derived synthesisers is the ability to generate every note on the keyboard from the master clock. This process is known as divide-keying. Many synthesisers from the 1970s and 1980s used some variation of the S10430 divider-keyer IC, which takes in up to 6 top octave generator inputs and outputs these across 4 octaves (giving 24 output notes total). Unfortunately the S10430 is a pretty much unattainable chip now, with single examples retailing for over £100, and no like-for-like replacement chips on the market.

Therefore to emulate the S10430, we must design a replacement using simple logic chips, which could require an enormous amount of hardware and PCB space. Therefore, it's really important to come up with an architecture that minimises hardware as much as possible.

Currently, while our microcontroller is able to receive and process MIDI messages, I haven't yet decided on a scheme yet for interfacing these messages with the synthesiser. Not because I'm struggling for ideas, but because the scheme will depend heavily on the divide-keying architecture, which I'm stuck between two completely different designs for.

I've been thinking about these two divide-keying designs all week, including writing some embedded code as a proof of concept, and I still genuinely can't decide which design I'd like to go with.

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Design 1 - Enforced 6-voice full polyphony

In this design, our ESP32 microcontroller uses a priority encoder to limit the synthesiser's polyphony to 6 notes. This means that if more than six notes are played at once, only the six most recently played notes are forwarded to the synthesiser's six voices.

Apologies for the C++ code dump, I'll try to explain it as best as I can.

On each Note On / Note Off event, the ESP32 extracts the pitch (eg. "A", "C#", "E") and octave (eg. "3", "4", "5") from a MIDI message. This is carried out by the function psiMIDINotetoSPN which takes a MIDI note between 0 and 127 and converts it into its SPN "Scientific Pitch Notation" format eg. A3, C#4, E5. psiMIDINotetoSPN outputs a std::pair, the first element being the pitch and the second element being the octave number.

We then create two "deques" (double-ended queues, a data structure in C++ similar to a FIFO buffer but with the ability to delete intermediate elements). This allows us to implement the "6 most recent notes played" idea. Read more about deques here: https://www.geeksforgeeks.org/cpp/deque-cpp-stl/

One deque dqsNoteFIFO consists of the pitches of all notes currently being played, and the other deque dqsOctaveFIFO consists of the octaves of all notes currently being played. Both deques move in phase, and may contain duplicate elements if multiple notes of the same pitch, or multiple notes in the same octave, are played simultaneously.

Now back to hardware - each deque element is then assigned its own synthesiser voice. This can be implemented using six multiplexers in parallel, with each multiplexer selecting one of the twelve TOG outputs. Each multiplexer output is then passed through one of six frequency dividers, which divide our square wave down across 8 octaves. Another six multiplexers are then used to select the octave required for each voice from the frequency divider outputs.

The six outputs of the final multiplexers should now correspond to the exact notes played on the keyboard.

This design would be excellent for implementing on something like an FPGA, which are great for implementing simple logic blocks like muxes and frequency dividers, I'd imagine a lot of pure digital synthesisers would do something very similar to this. This design however becomes quite unwieldy when built using individual logic chips, as whilst the design itself is simple, lots of logic ICs are needed which take up a lot of space. A single oscillator requires 12 multiplexers and 6 frequency dividers.

Advantages of this design:

- Uses fewer ICs compared to design 2; lower cost and lower PCB space

- A limited number of voices means that each voice can be given its own VCA/VCF, implementing full polyphony

Disadvantages of this design:

- Not very modular, more challenging to debug

- Each multiplexer has up to 12 inputs, so requires four simultaneous control inputs. Without serial conversion, we will effectively almost as many GPIOs on the ESP32 as notes

- Limiting polyphony is often a digital problem, and for an analogue synthesiser feels like solving a problem that doesn't really exist

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This design feels more elegant, and having precise velocity control of each note could create some really beautiful expression on something like a preset like a synth pad. I'll need to think carefully about how I can control the multiplexers without using tens of data lines from the ESP32 - sending serial messages to a set of latched shift-store registers like the CD4094 or 74HC595 could be an efficient way to continuously control every multiplexer without using lots of data lines.

Design 2 - Unlimited voice paraphony

I'm thinking that six voices of polyphony might not be enough. An attractive design with unlimited voice paraphony is possible with only a little more hardware.

First, let's discuss the difference between polyphony and paraphony. A fully polyphonic synthesiser has an individual VCA and VCF for every oscillator, which means that every note can have independent control of its volume and timbre. A paraphonic synthesiser on the other hand mixes all the voices into a single VCA and VCF, meaning that volume and timbre of individual voices cannot be controlled, only the overall volume and timbre. Whilst this reduces the musical expression of the synthesiser, the architecture is simple and easy to debug.

Rather than creating a set number of voices, an unlimited paraphony synthesiser divides down our TOG output into every note possible on our keyboard. This is achieved by using 12 frequency dividers, one on each TOG output, then using analogue switch arrays to turn on the notes we want to hear (that are sent through via MIDI). For a 4-octave keyboard, this results in 49 individual audio signals. Annoying to prototype, but won't be too much trouble on a PCB. These 49 voices are then fed into a summing amplifier where they are combined into a single audio signal, then into the VCA and VCF. 49 notes are far too many to have individual amplifiers and filters for, especially considering the average human only has 10 fingers this seems a little wasteful.

This design was what the chips I bought shown right at the beginning of this article were for.

Here is the start of a rather terrifying Altium schematic of what this would look like. Yes, a lot of hardware, but it's basically the same thing repeated 12 times. As each piece of hardware is allocated one unique note in this design, troubleshooting is much easier than with the MUXes, as issues can be localised just by recognising which note(s) aren't playing.

Advantages of this design:

- Very easy to debug

- Unlimited number of notes can be played at once

- Simpler control circuitry - no need for FIFOs to dictate which note is allocated which voice

Disadvantages of this design:

- Requires more ICs - a single oscillator requires 12 dividers and 12 switch arrays

- We no longer have individual velocity control of each note; we're throwing potentially useful notewise MIDI velocity data away

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From an engineering perspective, it's really difficult to make a decision here, as both are good designs for mutually exclusive reasons. This feels like it's going to be more of a musical decision based on what I personally want from the synthesiser rather than an engineering decision.

Over the next week, I'll have a proper think about what I want musically from my synthesiser, and make a more informed decision.

This week has been exceptionally hot in the UK, so much so that I've noticed my master VCO has drifted by almost a semitone compared to previous weeks when it was cooler. Pesky uni term has now finished, so I thought I'd give a breakdown of what's happened over the past couple of busy weeks before I start my internship. Lots of pictures and pretty graphs in this one.

Designing a MIDI receiver from scratch

My main work over the past couple of weeks has been in designing a MIDI receiver from scratch using an ESP32. Please don't reference the code below as it doesn't work.

This initial code uses repeated polling at the MIDI data rate (every 32 microseconds) and a state machine to determine when transmitted MIDI messages start and end.

The basic logic for reading MIDI signals is as follows - the received MIDI signal is HIGH when idle. When the MIDI signal goes LOW for the first time, this represents a UART start bit, and we know to start reading MIDI data on the next cycle. When 8 bits of data are received, a UART stop bit pulls the line HIGH again and we know that a MIDI byte has been received.

This entire loop is triggered by a timer on the ESP32 that triggers every 32us. The state machine helps to ensure that complete messages are read without transitioning back to previous states when 0s and 1s are detected in the data (which could be misinterpreted as start or stop bits if not careful).

Whilst my code is probably logically correct, I experienced some serious issues when hooking this up to my keyboard over a MIDI cable. I experienced lots of MIDI messages displaying "0xFF" which indicates that the ESP32 was encountering framing errors when attempting to sample data. If frames are sampled in incorrect locations, then low data bits may be misinterpreted as MIDI start bits.

Doing some simple timing analysis of the timer values on each Serial print, the sampling times were often nowhere near 32us, and a single error causes an irrecoverable offset to all subsequent samples.

I think I had overestimated how fast the ESP32 is. The ESP32 runs a lot of other processes in the background on top of the code it's running, and because it isn't very powerful it struggles to keep time well. This is an issue I experienced in some of my previous ESP32 projects that required a high data rate, I didn't think this would be an issue for something like MIDI.

Therefore, I needed another solution. I tried to stay away from an interrupt-based receiver as I don't know enough about interrupts to make design decisions (example code for this looks quite complicated and I don't really want to waste time).

I forgot one of the golden rules of engineering projects - to just get something working as soon as possible. The ESP32 already has a hardware UART receiver which runs in parallel with the main CPU, which is much easier to interface with, is virtually immune to timing issues (as it's hardware; should achieve similar performance to an FPGA implementation) and handles all the framing automatically.

With this implementation, MIDI transmissions always synced up with key presses on my keyboard, which indicates that the timing / framing was working perfectly. However, the MIDI messages didn't appear to match the data I'd expect for Note On / Note Off events and their respective key numbers. This points to an issue further upstream. I'm currently using a jumper wire from the midimuso CV-12 MIDI to CV converter taken just after the input MIDI signal is passed through the optocoupler. The 4N35 optocoupler that comes with the kit doesn't actually meet the MIDI 1.0 specifications as its rise time is too long (10us compared to 2us required). As several sources online state that they're having issues decoding MIDI with the 4N35 too, over the weekend when it cools down a bit I'll drop into Cricklewood Electronics to see if they have any faster ones (the MIDI specification recommends a 6N138 optocoupler which should be reliable for serial data up to 100,000 baud).

The VCO is extremely stable

My other task this week has been carrying out a full, detailed analysis on the stability of my VCO. All going well, this should conclude the first phase of the VCO development.

The required frequency setpoint of the clock generator for the Top Octave Generator to generate its 12 semitones correctly was around 1.890MHz. This number surprised me a little as it differed from what my TOG datasheet recommended as its input clock frequency, but the TOG outputs are pretty much perfect at this frequency.

With the circuit still assembled on a breadboard, I connected different parts of my oscillator up to a precision oscilloscope taking measurements at a set period to measure their stability over a 100-second period. In hindsight I should have taken more measurements but I think the results give a sufficient picture as is.

The master clock generator always maintains stability within 10kHz of its setpoint, which was better than I expected. This corresponded to a maximum frequency deviation of around 0.5% at the source. This surprised me a little as I didn't expect the potentiometer used to control the tuning to be so stable. Bear in mind this entire circuit is still on a breadboard, using discrete components costing fractions of a penny each.

After passing the clock generator input through the buffer, the clock frequency appears to decrease slightly to around 1.867MHz. This reduction in frequency may be caused by the CD40106 hex-inverting buffer's input capacitance. From the data, the CD40106 appears to have no noticeable impact on the VCO's frequency stability.

In both cases before and after the buffer, the distribution is close enough to be Gaussian to convince me that these frequency variations are near-random.

The frequency stability of the TOGs astonished me. This is C8, the lowest note the TOG outputs. The TOG output achieves a frequency stability of 0.06%, which, amazingly is lower than our 0.1% frequency stability we proposed right at the beginning of the project for frequency stability to be inaudible. Indeed, connecting a headphone amplifier to the output of the TOG and listening to the tone generated, even with the curse of my perfect pitch I can't hear any pitch variation.

The reason for this isn't directly due to clever design inside the TOG, but due to the intrinsic effect of clock division on percentage frequency jitter. 

To understand this, assume our input clock signal has an absolute jitter t seconds due to frequency instability and a period T1. (Jitter is the average time variation of a clock signal's positive edge from its ideal time). When we divide our clock frequency by a factor N, the absolute jitter does not change, but the duration of the clock pulse multiplies by a factor N.

The percentage jitter before clock division is given by 

and the percentage jitter after clock division is given by

This means that, simply because our clock period has increased (from frequency division), the variations in time of the clock edges is less significant compared to the clock period, assuming that absolute variations in the jitter remain the same before and after the divider.

Of course, we cannot assume the absolute jitter is the same before and after the TOG, as the TOG will introduce its own noise. Our TOG divides down our master clock by a factor of between 200 and 400 depending on the note generated, and we're only seeing about a factor 5 reduction. Regardless, this is still a fantastic result and meets our 0.1% stability requirement.

The note with the largest percentage frequency deviation is B8, which as we would expect from the theory just discussed, is the highest note on the TOG (which corresponds to the lowest factor N division). 

This tells us that the envelope of frequency jitter of any note we generate will lie within 0.06% and 0.11% of its set value. A fantastic result, and good enough for me.

My assessed university group project has completely consumed my time over the past couple of weeks. Some highlights include laying out triangular PCBs (not recommended...), measuring miniscule op-amp offsets, and blaming my horrific spaghetti code on sleep deprivation. Hence, I've struggled to find the time to work on the synthesizer. To be completely honest, it's difficult to find the motivation to work on circuits at home having spent 8 hours in the lab diagnosing uninteresting issues.

Regardless, over the past couple of weeks I've learned a few lessons, and weighed up the balance between analog and digital. More details below.

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Project deadline update

My deadline to complete the master VCO was the 31st May. I'm pleased to say I've met this deadline despite the unexpected volume of work from my university project. The only element of the first deadline I haven't met is the PCB design - because lead times are long and postage is so expensive, I'd like to wait until I have more designs before ordering.

Project stage	Things to do	Deadline
VCO and oscillator core	Decide on oscillator type, design wave generator circuits, prototype on breadboards, design PCBs, test initial prototype	31st May
MIDI control integration	Linking the VCO to a MIDI source, implement polyphony	14th June
Design of envelope generator, VCA and VCF	Decide on VCA/VCF types, decide between analog / digital implementations, prototype on breadboards, design PCBs, test initial prototype	11th July
Buffer period for integration testing / parts delay	Combining VCO, VCA and VCF designs to work effectively together, analysis of noise performance, hopefully prototype design PCBs have arrived	31st July
Improving stability	Adding improved power supply and temperature compensation for more advanced features later	mid Aug
"Nice-to-haves"	Noise generator, LFO, sample and hold, frequency modulated / sync VCOs	Sep

The next stage is MIDI control integration. I'm less sure I'll meet this deadline, as university project work looks to hotten up even further over the next couple of weeks.

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A disappointing accident - digital buffers always need power!

Earlier this week, I connected up one of my TOGs (Top Octave Generators) to the output of my VCO through a CD40106 buffer. For some reason, I decided that the CD40106 didn't need power or ground at all, and connected the floating output, with no reference from the power supply rails, to my TOG.

Around 5 seconds after connecting up the TOG, there was a large spark and audible pop as one of my NPN transistors upstream of the digital buffer blew up :( 

This caused a short circuit between power and ground. The power supply entered overcurrent protection mode but it was too late - the huge current had already fried one of my four delicate TOGs and made it unusable. At almost 2000JPY each, they weren't cheap, and with them being vintage replicas I was a little disappointed at this loss. So how did this happen?

I realised I completely misunderstood what kind of chip the CD40106 actually is. It's not a typical inverter/buffer per se - it's a Schmitt trigger inverter. Schmitt triggers inverters are devices used for converting noisy or erratic analog voltages into cleaner digital ones. They work by latching the output voltage at either +Vcc or GND depending on the input voltage and reversing the polarity of the input. By chaining two inverters together, we can create a digital buffer.

Schmitt triggers require a +Vcc and GND connection so that the output voltage can latch correctly. If there is no power supply rail, the output voltage becomes floating and behaves erratically, potentially drawing huge amounts of current (which I think is what happened in my case).

This damage would have been prevented by a quick look at the datasheet, and it's absurd this happened as I'm usually quite careful with this sort of thing. Perhaps I relied on the schematic a little too much, as it doesn't explicitly show the power supply rails. TLDR: Always read the datasheet before mindlessly wiring up an unfamiliar IC. (I hoped I wouldn't need to give myself this advice, but here we are.)

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Change of mind on oscillator design

At the end of our last update, I was positive we'd go with the oscillator from the RS-505 Paraphonic, as it seemed to be a better design. Whilst this is probably true, it brings a number of complications I hadn't considered earlier.

The RS-505 Paraphonic master VCO uses a varactor diode to control the oscillator's pitch. A varactor diode is a reverse-biased PN diode which functions as a voltage-controlled capacitance. Remember - the RS-505 is centred around a second-order LC resonator, so in order to vary the VCO's frequency we either need to change the resonator's effective capacitance or inductance.

Whilst standard diodes and BJTs can be used as rudimentary varactor diodes by reverse biasing them due to their voltage-dependent parasitic capacitance, this variation in capacitance is far too small (on the order of picofarads) to give us the tuning range we require. Therefore custom varactor diodes must be used, which have a much larger capacitance range (on the order of hundreds of nanofarads).

Finding through-hole varactor diodes is very difficult. Whilst the RS-505 Paraphonic design is a cool one, I think the additional complexity it brings is just not worth the additional circuitry or the unusual components. The ES-50 VCO achieves very similar (possibly even better) stability using fewer components, and is also a RC oscillator, meaning oscillation frequency can be controlled by a variable resistor, which is much more common and easier to work with.

The ES-50 tuning can be controlled coarsely by varying the 10k potentiometer VR4. In the ES-50 schematic, a negative supply voltage is used for tuning, which is then inverted to give a positive voltage at the output of the op-amp. As my home power supply doesn't have a negative supply rail, in my design I'll replacing this with a positive supply and a non-inverting amplifier set to have identical output ranges.

Potentiometers easily come disconnected, so it seems like a better decision to place the potentiometer on the ground path of the non-inverting amplifier rather than the feedback path, so that the gain goes to 1 rather than infinity if the potentiometer becomes open circuit.

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Oscillator control - The history

Let's now discuss a little bit about oscillator control. This refers to how we can use an external device to play notes on our synthesizer, and is also where faithfulness of our design to the 1970s/80s begins to fall apart a little.

The most obvious way to control our synthesizer (from a musical perspective) is to use a piano keyboard. For the oscillator to make sound, we need a controller to tell it the frequency corresponding to the key played, and the time the piano key is depressed.

In simple analog synthesis, the controller outputs two waveforms for each note - TRIG and CV. 

TRIG (short for trigger), consists of a short pulse that goes high when any note is pressed. Many analog synthesizers contain a circuit called a trigger-to-gate converter, which extends the pulse to the desired duration of the note and shapes the pulse using capacitors, resulting in a desired amplitude profile of a note known as an envelope.

The confusingly named CV (short for control voltage) consists of a DC voltage that represents the pitch of the note. Typically, higher DC voltages represent higher frequencies. Many synthesizers conform to the "1 volt per octave" rule, which states that as the frequency of the note doubles, the DC voltage increases by 1 volt. Incidentally, there are many other types of CV used to control amplifiers and filters for example, hence the confusing name.

The concept of CV and TRIG made a lot of sense for synth manufacturers who designed their circuitry, keyboards and control interfaces from the ground up. However, if like me you want to control the synthesizer from an existing, fairly modern keyboard, we'll need a different approach.

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MIDI 

The vast, vast majority of keyboard instruments are now fully digital, and don't have CV or TRIG as they don't use this method of control. Instead, many modern keyboards have a MIDI port on the rear.

MIDI (Musical Instrument Digital Interface) is a communication protocol very similar to UART developed specifically for musical instruments. It was invented in the early 1980s by mutual agreement between several American and Japanese synthesizer manufacturers wishing to make product development cheaper and more standardised. It has remained the standard for interfacing with musical instruments to the present day.

MIDI is perfect for my use case, as it supports polyphony off the bat (amongst many other things), and all of my keyboards already have MIDI ports on the back. The intention is to use a keyboard purely as a MIDI transmitter for my synthesizer, which is ironic considering the keyboard is able to synthesise sound in its own right.

I'm not going to explain the MIDI protocol here in fear of doing it injustice, but a detailed specification and summary of all the possible MIDI messages can be found at the two links below.

https://midi.org/midi-1-0-detailed-specification

https://midi.org/summary-of-midi-1-0-messages

The most important MIDI messages for now are the "Note ON" and "Note OFF" commands, which contain data equivalent of trigger/CV in a two-byte message.

I currently have a MIDI to CV converter kit under construction. As I don't think we'll be using CV, I'll jumper across the conversion circuitry and pass the MIDI data directly into a microcontroller / FPGA to decode our messages for us.

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Current controller interface design

This is my current design for a controller interface that takes our MIDI signal input and converts it into a polyphonic pitch output.

- The note encoder takes our input MIDI message and identifies Note On / Note Off events, and outputs 6 pitches (eg. C, D, E, F) and their corresponding octaves (eg. 2, 3, 4, 5) that are played.

- The pitch selector receives the 12 outputs of the TOG and the 6 inputs from the note encoder, and buffers 6 waveforms from the TOG as decided by the note encoder.

- The octave divider takes each of the 6 waveforms sent from the pitch selector and divides their frequency by the required power of 2^n to reach the desired octave.

This is the least hardware-heavy method of implementing polyphony that came to mind. An important design decision was placing the octave dividers after the pitch selector rather than before it, which reduces the number of frequency dividers required from over 70 on a 6-octave keyboard to just six.

The next stage of this project will be to implement some code to achieve this on either a microcontroller or an FPGA.

I've watched Eurovision every year for the past 10 years or so - this is probably the first time in the contest's history that an analog synth designer has performed on stage. A little disappointed that crazy British synth man didn't do so well this year, but it's been nice to hear murmurs of synths and vintage electronics in the news and I hope it's inspired some people.

This week

This week has been less productive than I thought it'd be, as I've found most of my time being consumed by our university group project. 

I've still been able to work for a couple of hours each evening at home, and have been focusing on breadboarding both the Korg Lambda and Roland RS-505 Paraphonic master clock generators, and building up the MIDI to CV converter which will become a significant point of focus over the next few weeks.

Many pictures this week and less theory :)

So...which VCO is better?

My main concern in last week's update was the compromise between the large rise-time caused by the Lambda's first-order feedback, and the possible increased parasitics of the Paraphonic's second-order feedback.

I had a suspicion that the Paraphonic's master VCO would be better performing, as the Lambda was designed as a budget synthesizer at the time of its release, but also questioned whether first-order feedback could be a better design choice. Over the past week, I've examined both circuits with the oscilloscope to get a real-world comparison, and the results are worth analysing.

This is the output of the Lambda's master VCO. The first-order charging and discharging of the 120pF capacitor is very obvious on the waveform, and the rise-time is close to our estimate, at around 120ns by inspection. Interestingly, I found that when the output resistors R9/R10 were left at 3.3kΩ, the output appeared more like a low-amplitude triangle wave. Therefore, I decreased R9/R10 by a factor of 10 to 330Ω, increasing the quiescent output voltage of Q1, and this seemed to do the job. I still need to play around with different values of R9/R10 that give the best results.

This VCO really impressed me with its fantastic frequency stability. Despite having a much less complicated negative feedback than the Paraphonic, the oscillation never varied by more than 8000Hz from its average frequency of 2.420MHz. That's a 0.3% maximum error, with standard deviation 0.2%! To put this into perspective, if the oscillator was tuned to A = 440Hz, then the oscillator's frequency would never go below 438.5Hz or above 441.5Hz. A perceptible difference, but much better than I was expecting, especially for a breadboard and my questionable wiring.

Undoubtedly a good design; the only thing letting it down is the clock rise time.

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...and here is the Paraphonic's master VCO output. I've supplied it at Vcc = +15V and Vee = 0V for simplicity in this picture, different from the negative power supply rail used in the original design. Everything else is unchanged, except for the lack of a varactor diode used for precise frequency trimming which doesn't really affect the behaviour or stability.

The rise time is much less than the Lambda, at around 40ns, which makes it more attractive for feeding into the clock dividers of the top-octave generator to follow. If you look closely, the ringing caused by second-order effects is definitely there, but it's very well controlled and small compared to the oscillation amplitude. I made sure to use a film capacitor in the LC tank instead of a ceramic one to try and help with this.

The frequency stability is also equally excellent - I didn't have the opportunity to measure it directly using proper equipment in the lab at college, but it's very comparable if not slightly better than the Lambda.

The only disadvantage of this circuit is its complexity - it uses significantly more components than the Lambda's VCO, and analysis / troubleshooting is much more complicated.

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In my master VCO design, I'd like to use the LC tank from the Paraphonic for its faster rise time, and the simpler negative feedback of the Lambda to reduce component count and complexity. Over the weekend I'll finalise my design and confirm it performs as expected.

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How can we interface the master clock to the rest of the VCO?

As previously mentioned, the master VCO will feed into a top-octave generator, generating all 12 notes on the highest octave of the keyboard, followed by binary dividers to generate all notes in lower octaves.

Our top-octave generator, the M082B1, uses integer division of the master clock by precise factors to obtain all the notes of the highest notes on the keyboard.

For example, to obtain a C# from our master clock generator (the lowest note in the top octave), the top octave generator divides our clock frequency by 451. In order for the sounding pitch of this note to actually be C#, we must precisely tune the frequency of our oscillator to a multiple of 99680Hz. This is a weird frequency, but I think it's specifically been chosen so that the integer division very closely approximates the true ratios between pitches.

I avoided talking about this until now, but both the Lambda and Paraphonic both have a DC voltage bias input which can be used to finely vary the frequency of our master VCO. This voltage can be set precisely to DC creating a fixed oscillation frequency, or modulated to create vibrato effects.

This is another reason why these analog clock generators were used, instead of a crystal oscillator which cannot change its oscillation frequency at all. The existence of this DC bias may also allow us to implement a phase-locked loop architecture in the future if we're feeling very fancy.

I must admit, over the past week I haven't had much opportunity to experiment with tuning or integrating with the TOGs due to time, this is definitely a task for over the weekend, and I'll report back on the success of this in next week's update, where if we're lucky we might be able to get some sound.

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The VCO deadline is fast approaching

My current deadline for completing the VCO is on the 31st May, just over a week from now. I'm confident we can get a working prototype for the full VCO before this date, though I'm not sure a PCB will be ready in time.

A lot of work with the VCO will also link nicely into my next deadline (14th June), where I integrate the VCO with keyboard control through our MIDI to CV converter (currently under construction)!

My last few exams went considerably better than the three exams I had before the last update. I might actually pass the year.

As of Tuesday all my exams are finished, which means I have much more time on my hands, and have been able to start building my home electronics lab.

It couldn't be any better timing; a large order from DigiKey arrived on Wednesday and another from Retroamplis on Thursday. Before we start talking about oscillator architectures, I'll list everything that came through the post this week for recordkeeping sake.

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In the post

BB830 solderless breadboard x2	£13.26
47pF film capacitor x4	£1.88
10K rotary pot x3	£3.15
100K trim pot x4	£3.45
180uH inductor x3	£1.38
TL074 quad JFET op-amp 14DIP x10	£5.99
J111 n-channel JFET x5	£1.70
CD4018BE 5-bit divider by N 16DIP x5	£4.70
CD4010BE buffer 16DIP x3	£1.92
8DIP IC sockets x10	£1.50
14DIP IC sockets x10	£1.42
2N3904 NPN transistor x25	£1.63
2N3906 complementary PNP transistor x25	£1.63
2N7000 n-channel MOSFET x10	£1.33
BS250P p-channel MOSFET x5	£5.65
M082AB1 13-note Top Octave Generator 16DIP x4	£35.81

This is a total expenditure of £86.40, bringing the total spend so far up to £129.25. This is a very significant order, and will probably be one of the largest of the whole project.

Choosing a VCO architecture

There are many different VCO architectures used in synths from the valve era right through to the present day. For musical use, they must all be of excellent accuracy to reproduce pitches well, no matter the temperature, environmental noise or any other initial conditions.

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Phase-shift oscillator

An oscillator, in its simplest form, is an amplifier with gain greater than 1, and a feedback network providing an overall phase shift of 360 degrees (such that the feedback signal superposes with itself). This is a necessary, but not sufficient, condition for oscillation known as the Barkhausen stability criterion.

Above is a schematic of a simple phase-shift oscillator. In the example above, the three RC stages provide a combined 180 degrees of phase shift, and the op-amp adds another 180 degrees of phase shift at the output as the signal is fed into the inverting input.

The circuit produces a sinusoidal output voltage, with frequency of oscillation is given by

There are a couple of problems with this circuit that make it unsuitable for use in our synthesizer. 

• The op-amp output will either grow or shrink exponentially unless the feedback resistor R_fb is set to an exact value. As our op-amp supply rails are limited, significant distortion may occur if the signal grows and clips at the rails, or worse the output voltage collapses as the closed-loop gain becomes less than 1.
• The output is a pure sine wave. Analog synthesizers use the principle of subtractive synthesis. This means that they start with a harmonically rich sound like a sawtooth, square or triangle wave, and shape the sound using VCFs and tone filters. A pure sine wave has no harmonics, so we cannot tailor the sound to our liking.
• Voltage control of the oscillator is challenging, as we need to simultaneously modify the feedback network whilst ensuring the open-loop gain remains 1. This means it's not suitable for varying frequency.

(N.B a technique called additive synthesis also exists, where sounds are synthesized by summing sinusoidal waveforms together. As many fundamental waveforms require infinite sums of sinusoidal waveforms, additive synthesis uses a lot of hardware very quickly.)

A circuit like this may be useful for low-frequency modulation at a fixed frequency such as tremolo / vibrato, but we need to continue our search to find something better.

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Relaxation oscillator

The relaxation oscillator is one of the most commonly used oscillators for producing square and triangle waves. It takes the form of an op-amp configured as a Schmitt trigger, which is a type of comparator with two voltage thresholds determined by the output voltage, R1 and R2, plus an RC discharge network (R3 and C) which creates a periodic oscillation. The relaxation oscillator is the working principle behind the legendary NE555 timer chip.

The output of this circuit will be a square wave as the Schmitt trigger flips between its two output states, with the voltage across the capacitor being a passable approximation of a triangle wave. Voltage control of the frequency is now much more easily implemented, as we can vary the frequency simply by changing R3 (or indeed C, though variable resistance is much more common).

This circuit is simple and solves some of the issues with the phase-shift oscillator, but is still not fantastic.

• The oscillator is quite unstable in frequency as it lacks any real negative feedback to preserve the resonant frequency.
• In an op-amp implementation, the maximum frequency of the oscillator is limited by its slew rate and bandwidth
• The oscillation is created by an RC network, which creates significant "rounding" as the capacitor takes time to charge, especially for low frequencies.

The relaxation oscillator is commonly used in things like alarms or extremely cheap audio equipment, that sort of just needs to make a sound or oscillate; where frequency stability or bandwidth isn't really that important. They are rarely used in synthesizers or applications where stability is important.

If we're staying true to the 1970s/80s, fast and precise op-amps were not nearly as widespread as they are now. Discrete transistors were more frequently used as they have much faster switching speeds. After turning to schematics from synth service manuals of the period for some inspiration, there's one particular type of oscillator that caught my interest.

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The clock-divider VCO (or DCO)

The clock-divider oscillator uses an extremely stable master oscillator that generates a clock signal, typically in the MHz range. This is fed into a specialised chip known as a top octave generator (TOG) that divides this clock signal by an integer to obtain the "top octave" of the keyboard. This signal is then fed through a divider-keyer, which is effectively a set of divide-by-2 flipflops, to generate all octaves on the piano keyboard.

This is exactly how many late 70s/early 80s polyphonic synths generated their waveforms.

This architecture is significantly more complex, and blurs the boundary between analog and digital, but it is significantly more robust and frequency stable than free-running oscillators (like the phase-shift and relaxation oscillator). Some synth enthusiasts would argue that clock-divider VCOs are so precise they feel almost clinical, as they lack the "analog imperfections" of slight phase and frequency variations between notes. But my engineering brain tells me that it's always better to create something stable first then introduce controlled instability later, rather than settling for something suboptimal due to previous design choices.

One advantage of the clock-divider architecture is that because all notes on the keyboard are derived from the same clock, even if the master clock drifts slightly, the notes in a chord should always sound in tune relative to one another. Polyphony is also very easy to implement, as a single top-octave generator and divider-keyer can, and does, supply the frequency to every note on the keyboard. The only limitation to polyphony is the frequency of MIDI note events.

The most challenging part of the VCO design will be the master clock generator design. How can we design an accurate clock generator that meets our frequency stability requirement of 0.1%? Let's turn to two example designs for inspiration, one which I believe might be better than the other.

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Evaluating clock generator designs

This is the master clock generator / oscillator from the Korg Lambda ES-50, released in 1979. The Lambda was considered a budget synth at the time of its release, so the electronics might be skimping a bit compared to Korg's cream of the crop (don't get me wrong, it's not a bad synth by any stretch of the imagination!)

 While it looks a little complicated, analysis based on the Barkhausen criterion mentioned earlier simplifies the analysis a lot.

• This oscillator is centred on transistors Q3 and Q2, which are both configured as common-emitter amplifiers. As collector voltage of a CE amplifier is 180 degrees out of phase with the base voltage, the total phase shift in the loop is 360 degrees with a resonant frequency determined by C5 and R16. This satisfies the Barkhausen criterion.
• Transistor Q1 is a PNP transistor configured as an analog buffer, creating additional stability.
• C3 and C6 I believe are decoupling capacitors. Whilst they do slightly influence the resonant frequency of the oscillator, I don't think they're meant to.

The result is a near square wave at the collector of Q1. As the oscillator runs at quite a high frequency, despite C5 being tiny its rise time is likely to be significant. A quick check using the rise time approximation of a first order system gives t_r = 2.2RC = 150ns, which for the oscillation frequency of 2.3MHz makes up around 70% of the square wave on-time.

Is this acceptable? I'm not sure, and I suppose this is the purpose of the 4069 buffer after R9 to sharpen up the clock edges, but from my simulation the 4069 doesn't appear to have much effect, at least from a signal integrity perspective. Long rise times are generally bad for flip-flops as it increases the chance of them entering a metastable state during state changes.

On the other hand, as the oscillation is first-order, there will be no overshoot, undershoot or ringing of the clock, which is good. This could be a design compromise to prevent this from happening.

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This is the master clock generator from the Roland Paraphonic RS-505, released in 1978 at a similar time to the Lambda. This was a high-end string machine, and has the design to back up the price tag. I must admit I don't completely understand this design yet, however it's clear this uses a second-order LC resonator made up of C10 and L1 and a much more complicated feedback network. As previously remarked in an earlier update, this synth uses 0V as the positive supply rail and -15V as the negative supply rail, supposedly also to improve stability by reduced electromagnetic effects.

For my master VCO, I'd like to take inspiration from both these designs, and form a Franken-VCO that interfaces well with the digital stages. 

Next week, I'd like to construct these circuits and conduct a detailed real-world analysis of this circuit on a breadboard - if these circuits achieve good stability on the breadboard, they should still be reliable on a well-designed PCB, which I'd like to get sent off by the end of the month.

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(Sorry, I lied about this being a purely analog synthesizer. Nevertheless, it's happening!)

As predicted, none of the exams I've had this week went particularly well. But maybe I'll surprise myself like last year when results come out.

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This week

Not much progress this week due to exams. As mentioned in last week's update, I hope to start building from around mid-May.

When I haven't been in Laplace transform jail, this week I've been thinking about project timelines and also about possible designs for my VCO. I'll start with discussing project timelines first.

Project stage	Things to do	Deadline
VCO and oscillator core	Decide on oscillator type, design wave generator circuits, prototype on breadboards, design PCBs, test initial prototype	31st May
MIDI control integration	Linking the VCO to a MIDI source, implement polyphony	14th June
Design of envelope generator, VCA and VCF	Decide on VCA/VCF types, decide between analog / digital implementations, prototype on breadboards, design PCBs, test initial prototype	11th July
Buffer period for integration testing / parts delay	Combining VCO, VCA and VCF designs to work effectively together, analysis of noise performance, hopefully prototype design PCBs have arrived	31st July
Improving stability	Adding improved power supply and temperature compensation for more advanced features later	mid Aug
"Nice-to-haves"	Noise generator, LFO, sample and hold, frequency modulated / sync VCOs	Sep

If I can get to having a good VCO, VCF and VCA by the end of July, I'll be happy, as this will give me a solid two months to add interesting improvements. I have an assessed university project from May-June, and an internship during July, both of which should come first, so I've given extra time to some of the earlier deadlines.

This plan almost definitely will change during the course of the project. This is my first build at this scale, and my first time making a synthesizer, so I'm prepared to anticipate and embrace delays.

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In the post

The CV-12 is a remarkable chip, which is capable of converting digital MIDI signals into a CV (control voltage) and a trigger (a short pulse that tells an envelope generator / amplifier when a MIDI Note On event is detected).

Many MIDI to CV/Trig converters are very expensive, with good ones costing around £100 each. These are intended more for the Eurorack market rather than for ground-up electronics builds, so don't really fit my requirements or budget.

What makes the CV-12 special is that it is capable of polyphonic MIDI to CV conversion, meaning it is capable of outputting many control voltages (corresponding to many different notes) at once. This means it becomes possible to play chords from the get-go. It's also fully configurable with various mode changes. Polyphony can be sacrificed for additional MIDI parameters like note pressure and pitch bend, and even VCF parameters like cutoff / resonance. Considering what this thing can do, £17 is an absolute bargain.

I also bought an SMD soldering practice kit, if not for learning how to solder SMD components for this project then just for a bit of fun. This consists of a small, and a variety of SMD resistors, capacitors and chips in different sizes to practice with.

I don't think I quite realised just how small SMD components really are - whilst the 1206 and 0805 size look manageable to solder with my iron, the smallest 0402 size ones are absolutely tiny.