The project uses '377 chips for the accumulator and output registers instead of the more obvious '273. The difference is pin 1. In the '273 this is a reset pin and we don't need that. In the '377 this is a (negative) enable pin, and that is very useful. It simplifies the control logic in the case of consecutive loads. To see why, consider the timing diagram:
The '377 can be wired directly to the clock on pin 11 and to the register address decoder on pin 1. If we were to use the '273, we only have pin 11. But if that is connected to the decoder, as in the middle case, consecutive loads don't work: only the last load will give a positive edge and therefore transfer a value. The earlier load values are missed. This is not good for the accumulator and for output, as each value can be important.
To make the '273 work, you need to put the logical OR of CLK and /EN on pin 11, so you get two edges. But the control logic doesn't have spare OR gates available, so that would cost an additional 74LS32 chip. Either that, or it would cost speed, because you can simulate the effect in software with NOP instructions. But then we are also stuck with half the horizontal resolution for the video signal. Not nice.
For the other registers these considerations don't hold and they can keep using the '273.
Today my order of '377 IC's has arrived, so the project can continue.