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A project log for TMS9900 compatible CPU core in VHDL

Retro challenge 2017/04 project to create a TMS9900 compatible CPU core. Again in a month... Failure could be an option...

Erik Piehl 09/13/2017 at 20:261 Comment

After extensive debugging and comparison of execution logs between the FPGA CPU and the results of Classic99 emulator with the same ROMs, I found and fixed four bugs, one of them being quite nasty to find. But the results were very pleasing, now with my own boot ROM and Defender cartridge loaded I get this picture (story continues after the picture):


For the first time the FPGA CPU renders the opening screen correctly! Interrupts were disabled (at hardware level) for this run. 

Even more pleasing, I tested the bug fixes with the normal TI-99/4A ROMs, and got this boot picture for the very first time (story continues after the picture):


Personally this was a wow moment! 

So what were the bugs? Three related to flags, and one to addressing modes:

After fixing all of the above the FPGA CPU runs the TI99/4A boot ROMs and renders the familiar boot picture! It then stops at address >0296 where it finds the opcode >3D06. This is a divide instruction, and the FPGA CPU does not support it yet, but rather simply stops and leaves the program counter pointing at the unimplemented instruction, making the problem easy to spot. I knew that this instruction was still not implemented, so I was happy to see that the reason for the CPU halting was the "right" one. Hopefully after implementing this last thing the CPU fully works and finally marks the implementation of the entire TI-99/4A computer on the FPGA!

Discussions

BigEd wrote 09/15/2017 at 15:04 point

Excellent!

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