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YGREC-ECL

At the opposite site of the spectrum, this project is incredibly smaller and faster than the relay implementation of YGREC.

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I try to implement the YGREC architecture with another discrete method, this time using tiny and incredibly fast transistors. Only ECL can keep pace with the BFS480, a dual-NPN packaged in tiny SOT323-6 with a GBW product of 7GHz.

I've been musing with ECL for the germanium version of YGREC, then pseudo-ECL with silicon, but here it's the real deal ! The gate density is significantly better and I hope I'll overcome the difficulties that Dieter Müller encountered with the BFR93A, 10 years ago...

Some time ago, like, 10 years ago, Dieter Müller worked on http://6502.org/users/dieter/decl/decl1.htm for his next discrete computer and he had to shelf the idea. I have the pretention to do better :-P

Why ?

  • Because I have a viable computer architecture (the YGREC, as described in #AMBAP: A Modest Bitslice Architecture Proposal and #YGREC-РЭС15-bis, and now the smaller #YGREC8) so the ISA and structure are well understood and out of the way. As long as I got MUX, I can build it.
  • I also have new laboratory equipment that would help. It's good to be able to inject 4× 200MHz signals and watch them on a 500MHz scope :-)
  • Because I have Dieter's log to examine and take lessons from !
  • And my new secret weapon : the BFS480... two 7GHz GBW transistors in a single, tiny SOT323-6 package (aka SC70), a 10× increase in density (I'm not even taking double-sided PCB into account because I don't feel like doing 4-layers PBC, we'll see if I'll be compelled)

Of course it will be hard but I have already solved many issues with the relay implementation. Dieter's log correctly warns about signal distribution across the whole processor, but I counter with this:

  • smaller transistors means smaller circuits and shorter traces. The SC70 package is very low profile so the bitplanes can be stacked much closer to each other, 5mm apart instead of 25mm apart with the relays. This greatly shrinks the backplane ! That's less than 10cm for the distribution backbone, or roughly 300ps.
  • I have thoroughly analysed the fanout, partition and distribution of the main control signals of the YGREC so they are under control. Instead of spending my time playing with a few ECL gates to make them run faster, I'll focus on the distribution networks, where all the speed is actually lost. I can cut corners with the logic gates, sacrificing a bit of raw speed for a low power consumption and fewer transistors (which again, just like in ASIC design, is a virtuous circle)

I just hope that I'll have enough parts...


Logs:
1. A sidequest, already
2. moving forward
3. Bibliography
.

  • 5400 × BFS480 dual NPN, 7GHz BGW, 8V, 8mA,

  • Bibliography

    Yann Guidon / YGDES07/12/2018 at 12:28 0 comments

    A very generous donator has sent me these books :-)

    I can't believe how much I'm discovering in them !

  • moving forward

    Yann Guidon / YGDES07/05/2018 at 17:41 9 comments

    Edit: Forked to #Precision current generator


    I am soon getting SOT363-DIL adapters so I might soon evaluate the BFS480.

    Meanwhile, I must also evaluate the various peripheral circuits, such as current sources and current mirrors. And if I have a digitally controlled PSU, it's not  working in a suitable range : I want a better precision, from about some µA to maybe 20mA. A good PSU has a resolution of several mA...

    ECL circuits use a bias current of about 4mA but I want to to vary it. And a using a fixed resistor on a 9V battery will not provide enough stability if the output voltage varies...

    There are many example circuits for current generators, or current limiters, on the 'net. Here is a little sample of what I've found (and links to the pages) :

    Current sources and mirrors



    My design priorities are simplicity, use of basic parts (I don't want to use an IC or Opamp) and "some stability". It will be a high-side circuit (to fit with most NPN current mirrors) so it must use a PNP transistor (as in the last picture).

    At first the bias-diode-based circuit (as shown just above, or in the 2nd box of the first image) looks interesting: 2 standard diodes set the base voltage, and more if a range switch is added. Very fine tuning can be added with a series adjustable resistor to change the current. However the bias might not be very stable, with a mismatch of thermal coefficients, and because there would be 2 or more PN junctions on one side, but only one on the transistor side.

    A 2-transistors circuit is chosen, as shown on the pictures. If both transistors are from the same lot (and stuck together), the thermal behaviour should be almost identical and the circuit is a bit more stable (I hope, because there is only one junction). I won't use high currents so heat won't be a significant issue. I can still add a finetuning adjustable resistor, in addition to the main current setting resistor. Its value is approximatively set as follow :

    I=U/R=Vbe/Rs= 0.7/R

    I have found a nice potentiometer, 220K log, so the minimum current is about 0.7/220000=3µA.

    Max current is R=U/I=0.7/0.02=35 Ohms so a fixed 33 ohms resistor is added in series.

    Another 2K potentiometer in series (R2) adds more tuning flexibility though (unlike with the diodes voltage reference) I doubt it's actually useful (I'll have to test).

    I also want to add a current probe (ammeter) in series...

    A single alkaline 9V battery should be enough, but an external PSU can also be used. The voltage difference for the circuit can reach about 8V (9V minus the Vbe and some Vce_sat) but can be increased with a higher supply voltage. The ammeter's drop should also be considered... It varies from device to device so I can't be sure yet.

    But for 5V-powered ECL, it should be good enough :-)


    OK, the first prototype doesn't work as well as expected but I built it in a hurry... at least I have a fancy box with nice knobs :-)


    2nd prototype accepts to work. The 220K log pot is great for the range under 1mA, down to 4,7µA.
    The range above 2mA is tricky though, the low-value potentiometer might not be adapted. Maybe a log type would work better. And I still don't know why it was so difficult to make it run correctly, why I measured odd voltages, but I was initially in a hurry so I might have overlooked something.

    I want to generate not-too-unreliable currents, up to maybe 10mA. The ammeter measures 17mA when it short-circuits  the output. The potentiometer can't set the current reliably above 3mA...


    20180711:

    I replaced the pot with a 4K7 log model and it works better, though I should really replace it with a 2K2 log model. I can get a good usable range but the higher current values are still tricky,...

    Read more »

  • A sidequest, already

    Yann Guidon / YGDES04/10/2017 at 03:13 0 comments

    The project has received all the 5400 dual-transistors (with the hope that 10800 transistors will be enough, but you never know, right ?) and already a question arises : how to test them ?

    I have the fast DDS but the BFS480 is one notch higher. So the idea is to see if it can be used for an avalanche pulse generator to generate sub-nanosecond signals ?

    I have seen the venerable 2N2369 used for this purpose but it's a 50-years old part. The BFS480 is not only faster, but also has lower breakdown voltage, which is a nice thing, no ? A dumb oscillator and simple charge pump should be enough to generate the low-current higher voltage that such a circuit needs.


    Some background and references

    but I have never seen a low power UHF transistor.

    AN72 however covers the "balancing" technique, using a pulse transformer to create a symmetrical pulse. This will be needed to test the transmission lines of the clock and control pulses...

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Julian wrote 07/08/2018 at 22:08 point

Nice project.  Have been playing with differential amplifier designs using fast transistors in simulation lately, with the idea of implementing something either in ECL or a similar current-mode logic (possibly with differential signalling so I can use a lower noise margin) although I'm still by no means happy with the results.  Have never really been much of an analog circuitry person, to be honest, so this is pretty new to me.  Hadn't seen the BFS480 when I was picking my components, though.  I've been mostly playing around with 2SC3356s, but the BFS480 would make for much more compact designs, with a lot fewer fiddly little 3-pin chips to solder, and only costs a little bit more.  Is there a PNP equivalent available?

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Yann Guidon / YGDES wrote 07/10/2018 at 09:05 point

Hi !

I have not encountered a PNP equivalent, unfortunately, it would be awesome though...

If you've tried discrete logic, would you share your experience with us at #Hackaday TTLers 

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Julian wrote 07/11/2018 at 06:07 point

Well, I'm working on it, so I wouldn't say I've so much *tried* it as yet.  Have only done simulations so far...

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Yann Guidon / YGDES wrote 07/11/2018 at 10:30 point

Any experience is good ;-)

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K.C. Lee wrote 07/11/2018 at 12:47 point

Carrier mobility isn't as good as electrons.  That's why NPN, N-MOSFET have better performance than their PNP, P-MOSFET counterparts.

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Morning.Star wrote 04/08/2017 at 22:49 point

Lol :-)

And 200MHz, thats a disgustingly fast rig Yann, well done.

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Yann Guidon / YGDES wrote 04/08/2017 at 22:57 point

Thank you eBay ;-)

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