This project is powered by RggBer which is the FPGA based development kit for embedded vision. Visit RggBer hardware specification project to have more information.
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System level diagram of this image network
The “?” in it is color bar video generated by FPGA itself to fill 2x2 area on LCD.
The image stream path is shown in below board level diagram in details. As green dash line and gray dash line indicate, FPGA receives video streams from HDMI input port and CIS module and then combine them together to DDR2 frame buffer. The orange dash line indicates that FPGA takes the pixels from DDR2 and then transmits it to HDMI TX chip.
You may use Android App to switch between the 4 channels.