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FPGA and DDR3 layout

A project log for Maker's Tablet

Modular, low-cost of entry, open-hardware tablet and development platform for Intel and ARM SoC processors + FPGA.

Emparete LLCEmparete LLC 08/09/2014 at 14:510 Comments

August 9, 2014

Last 6 days worked on a 4-layer PCB layout of the FPGA module. FPGA selected in this first module is Xilinx Spartan-6 in a 324-pin BGA package. This is the same package used in the Novena laptop, and comes in 4 different capacities. PCB software used is Designspark. 

Designspark is surprisingly feature-rich for a free (not open-source) schematic and PCB software. It is very intuitive to use, and has no artificial limits in size, pin count, or number of layers. I tried Eagle but did not like its unintuitive UI. Open source KiCAD is lacking some features that I need, such as split power planes.

Schematic and PCB layout for the FPGA connecting to a DDR3 DRAM is being worked on first.

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