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More Booster design considerations - input/output capacitors

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bud-bennettBud Bennett 07/23/2017 at 18:082 Comments

A comment from PaulV got me thinking about the values that were used for the input and output capacitors on the boost converter. I was aware of bias voltage and temperature effects on ceramic capacitors. This article is a good introduction to the subject, but it is a just the start of your education.

This is the schematic for a typical 5V/3A application as shown in the data sheet:

But the capacitors shown in the schematic are not really the correct capacitor values needed for proper booster operation. This is what the data sheet has to say about the “effective” capacitor values:

“The TPS6123x requires at least 20-μF effective capacitance at output for stability consideration. Care must be taken when evaluating a capacitor’s derating under bias. The bias can significantly reduce the effective capacitance. Ceramic capacitors can have losses of as much as 50% of their capacitance at rated voltage. Therefore, leave margin on the voltage rating to ensure adequate effective capacitance. In this example, three 22-μF capacitors of 10-V rating are used.”
“The required minimum effective capacitance at input for the TPS6123x is 4.7-μF. Considering the capacitor’s derating under bias, a 10-μF input capacitor is recommended, and a 22-μF input capacitor should be sufficient for most applications. There is no limitation to use larger capacitors. It is recommended to put the input capacitor close to the VIN and PGND pins of the IC. If, for any reason, the input capacitor cannot be placed close to the IC, putting a small ceramic capacitor of 1-μF or 0.1-μF close to the IC's VIN pin and ground pin is recommended.”

So why are my capacitors so big? I’m using a 47µF//1µF at the input and (3or4)x47µF//1µf at the output. Mostly it’s because I have a given inventory of capacitors and I don’t want to pay exorbitant prices for a few more. So I have to compensate for that.

The data sheet recommends a specific capacitor C1 for the booster input: a Murata 10 μF 6.3 V, 0603, X5R ceramic (GRM188R60J106ME84). If you spend the time to locate the data sheet and look at the bias voltage variation you’ll eventually find this plot.

Note that the capacitance is about 3.5µF with a DC voltage of 4.2V. It appears that TI is cutting it a bit close here. Maybe they are hoping that C4 can make up the difference, but C4 is only 0.3µF at 4.2V, so the grand total is about 3.8µF at the input. So much for a minimum requirement of 4.7µF.

I rooted around Digikey to find out what the voltage variation for my choice of input capacitors might be. I’m using a 47µF (6.3V, X5R, 0805) in parallel with a 1µF (16V, X7R, 0805). The typical bias voltage variation for the 47µF X5R is shown in this graph.

The capacitance falls off by 75% with 5V across it!!! But even so, the effective capacitance is still around 12µF. The 1µF doesn’t add much to this, but is there to improve ESR at high frequencies. It appears that my design meets the minimum effective capacitance requirement even after factoring in the 20% initial tolerance and temperature effects.

OK. Let’s take a look at the output caps. TI is using 3x22uF (10V, X5R, 0805). Here’s the voltage bias curve of their suggested cap.

At 5V, the capacitance drops from 22µF to around 10µF — a fall of more than 50%. Three of them in parallel yields 30µF, which is well above the minimum effective capacitance requirement of 20µF. 

My effective output capacitance with 3x47µF (6.3V, X5R, 0805 -- same as the input cap) is about 36µF, so it is similar to what TI is using, and has room for tolerance and temperature variation. In addition, you must think about the derating the capacitor voltage rating at high temperatures. Since I don't expect to exceed 85°C I think that I can get away with using 6.3V rated capacitors at the booster output. If the board had to operate above 85°C then a 10V rated cap must be used, along with an X7R temperature rating (-55°C - 125°C).

QED.

Discussions

Bud Bennett wrote 07/25/2017 at 15:04 point

When I first read the Maxim article I was shocked at the voltage variation of these small ceramic capacitors. The REALLY interesting thing is that the form factor (i.e. 0805 or 1206) determines the amount of voltage variation for a given capacitance value. So TI's suggestion to just use a 10µF 10V rated 0603 capacitor instead of a 10µF 6.3V 0603 cap doesn't fix the problem (though changing from X5R to X7R would probably help the situation). You must either choose a smaller value in the same form factor (sometimes not possible), or keep the value and either change to a better dielectric type or a larger form factor if you have the space on the PCB.

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Paul Versteeg wrote 07/24/2017 at 06:56 point

It did not occur to me that my simple question opened up this can of worms. I did not know these facts, so thank you once again for opening my eyes and furthering my education. That article is great, a must read!

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