A project log for MARK-II

Simple SoC written in VHDL.

Vladislav MlejneckýVladislav Mlejnecký 11/20/2017 at 16:050 Comments

I just finished SDRAM driver. It is a bit simple driver and is compatible only with IS42S16160B but it is working and now I have plenty of memory space waiting to be filled up with something interesting. :)

Here is an link to pull request:

I also made some progress with board. I decided to use MAX10 FPGA. 10M25DAF256 exactly. Yes, in 256pin BGA package . It will a bit challenge to route everything on 4layer board but I will do my best.