iCE5LP-DKE Lattice Development board

Simple iCE5LP FPGA open-source development board with embedded config loader

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This is my open-source development board for Lattice iCE40 (iCE5LP) FPGA.

It features embedded STM32-based USB configuration loader, onboard M25Pxx series SPI-Flash, some LEDs\swithces\buttons, PLS\PLB headers and Saleae Logic compatible connector. It even have super feature - Hackaday logo!))

Software for STM32 created using STM32HAL and Labview from PC side. In current version it capable to make all Flash related read\write operations, load config to FPGA, execute custom SPI commands. This protocol based on USB-CDC with simple commands in format:
System:Command:Argument;\r (for example FLSH:DEPO; stands for execute Flash enter to deep power down mode command.

On optimized code it takes approximately 4s to load 70kB config file.

Plans to do:
1) Code optimization
2) Config files compression\decompression
3) FPGA demo projects

May be in a future:
1) Fix HW bugs
2) Make new layout
3) Lite version

  • 1 × iCE5LP in QFN48 (any capacity you can find) FPGA
  • 1 × STM32F070F6P6 Config loader\USB-CDC\USB-SPI
  • 1 × M25Pxx in SO8 (any capacity larger than 1 Mbit) User storage or serial configurator
  • 11 × 0603 LED
  • 3 × LD1117 LDOs (1.2V, 2.5V, 3.3V 800mA)

View all 11 components

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