• Step 5 - Fixing the ALU and Building the Program Counter

    tomtibbetts04/07/2018 at 22:04 0 comments

    My latest video can now be found on YouTube: 

    I have validated that the issues I was having with the zero detect circuit was caused by the logic levels being pulled down by the LEDS on the output of the ALU.  I went ahead and replaced the LEDs with a small circuit board populated by an ULN2803 darlington transistor array to drive the LEDs.  This solved that problem.

    Otherwise, I have built the program counter and it works with no issues.  The circuit for it is below.

  • Schematics for Board Two are now available

    tomtibbetts01/02/2018 at 00:05 0 comments

    Hello everyone.  Thank you for visiting my project.  I apologize for taking so long to get back to this project with updates.  Hopefully, I can start getting videos and documentation uploaded here soon.

    In the meantime, I uploaded the schematics for the board two into the files section.  This should be helpful for people.

    Cheers,

    Tom Tibbetts

  • Step 4, Building the Arithmetic Logic Unit (ALU)

    tomtibbetts09/05/2017 at 01:09 0 comments

    This next step involves building the ALU.  The schematic is below.

    Things of note that are not in Ben Eater's design include the 74HC4078 octal nor/or gate I use to detect a zero condition.  Additionally, I added another 74ls173 quad latch to store the zero flag, the carry flag and the sign flag (goes to a one if the result is negative).  These flags will be used later on when I need to do conditional jumping.

    I did have issues with this build because of the forward voltage of the LEDs.  In Ben Eater's design, the LEDs are wired directly from the logic outputs to ground without a current limiting resistor.  You can get away with this in a lot of cases because most logic gates have built in 100 ohm resistors to limit current.  The down side of this is that the most voltage you can get for a logic one is whatever the forward drop is of the LED, in my case about 1.9 volts.  The problems this causes is that some of the logic inputs that follow have a hard time determining whether the signal is a logic one or a zero because, if you look at the specs sheets for these gates, you need a minimum of about 2.0 volts for a logic one.  Additionally, the 74HC4078 is a cmos gate, so it needs about a minimum of, I think, 4.5 volts to register a logic one.  So, consequently, I was never able to detect a non-zero state because the gate would never see a logic one.  If you watch my video, you will notice that I removed the LEDs from the output of the 74ls283 adders because of this issue.

    Other than the issue with the LEDs there were no changes to the board.

  • Step 3 - Building the B Register

    tomtibbetts08/26/2017 at 16:14 0 comments

    This step involves building the B register.  There is not much going on here, just a couple of latches (74ls173) and LEDs.  The build was pretty straight forward with no glitches.

    Next step will be to build out the ALU.  This will be interesting!

    And, here's the video:

  • Step 2, Building the A register (accumulator)

    tomtibbetts08/15/2017 at 21:04 0 comments

    In this, step two, we are building out the A Register.  The A register is used as the accumulator for the computer and, as such stores the results of additions and subtractions.  We will be using 8 red leds, 2 74ls173s four bit registers and 1 74ls245 bi-directional tri-state buffer.  Here is the section of the schematic we're building:


    Of note are the control lines: Clr (for resetting the register to zero), Clk for latching a new value into the register, ~A In, to enable the register to load new data, and ~A Out for moving data from the A Register to the W Bus which we built earlier.

    I did come across a design flaw while testing this.  I had the direction pin (pin 1) of the 74ls245 set to the wrong value.  Because it was set to logic zero (GND), it was expecting to move data from the W Bus to the A Bus when really we need the opposite to happen.  The fix was relatively easy, a matter of cutting a couple of traces on the back of the board with an Xacto knife and soldering wire wrap wire to complete new traces: 


    And here is the schematic showing the fix:


    And finally, in case you're interested, here is the step two video.

  • Step One: Building the W Bus with Annotation

    tomtibbetts08/03/2017 at 00:38 0 comments

    The W bus is the main bus for the SAP 1 computer.  Data enters the bus from various sources then gets routed to various destinations.  An example would be loading the A register from memory.  

    We build the W bus first because it will allow us to test register and other functions more easily as we assemble we assemble each module.  This is because we have a direct way of entering data onto the bus through an 8 bit dip switch.

    First we install eight red leds, the 330 ohm current limiting resistors and the 10K ohm pull down resistors.

    Next, we install S1, the DPDT slide switch, the green Run led and the red Pgm (program) led along with their 330 ohm resistors.  These are indicated in the region marked in red below.

    Next, we install S4, the 8 position dip switch.  We install it upside down so that its position numbering runs from most significant bit on the left to the least significant bit on the right.  Also, it needs to be upside down so that a logical one is when the switch is in the up position.

    Finally, we install U24, the 74ls245 tri-state buffer.  Whenever S1 is in the Pgm position, this buffer will be enabled allowing the data set by S4 to be placed on the W bus.

  • Sap 1 Computer: Step 1, Building the W Bus

    tomtibbetts07/26/2017 at 15:18 1 comment

    I started building out the board.  I decided to start with the W Bus as this will be the easiest way to get data to all the registers as I build those blocks and test them later on.

    The W bus is pretty straight forward and I had no issues with it.

    Here is the video link:

  • Added the Board 1 schematics

    tomtibbetts07/21/2017 at 18:35 0 comments

    Just uploaded the board 1 schematics in PDF form.  In cleaning up the schematics I discovered a few errors that will need to be fixed on the board in a future revision.  Some, I've already discovered while constructing my prototype and a few while cleaning up the schematics.  This will all be documented and discussed on the short videos that I'm making as I build the prototype.

  • FIrst Board Layed Out and received from OSH Park

    tomtibbetts07/20/2017 at 00:28 0 comments

    Over the course of the last couple of months, I've been laying out the first of two boards for this computer.  The first board will hold the following:

    • W Bus display
    • A register
    • B register
    • ALU with carry, sign, and zero flags
    • Program Counter,
    • Memory Address Register
    • Memory
    • Data entry

    I plan board two to contain:

    • Timing and Control logic
    • Output register
    • Instruction register
    • Instruction decode
    • Power supply

    The second board will have an external connector so that you can extend the W Bus and Control signals to a breadboard.

    I already received the first board and started to assemble and test it.  I am logging and video logging my progress as well as challenges and solutions.  This project is very much a learning process for me as Ben Eater has done things with the electronics in his videos that I have not previously considered.  So, I'm eager to see how well this all translates to printed circuit boards.