Between exams and studying and surviving, I'm continuing to debug the oscillations in the amplifier circuit, and I think I'm finally on to something. I talked to a friend who works at Prodrive (super nice company) and another friend who was in Green Team Twente (super nice team) with me, to get an understanding of what is going on.
To get an opamp to oscillate, you either have to have positive feedback, or have a phase shift in your negative feedback such that it becomes positive feedback. I did some simulations and thinking, but neither of these seemed the case. The negative feedback is fairly negative, and the positive feedback is directly tied to a voltage regulator.
So my thought was simple: therefore it must be the voltage regulator. So I probed that, and HOLY MOLY.There are peaks of 100mV on the supply, compared to a 10mV input. No wonder... But why?!
Well, it turns out that most voltage regulators can only source current, not sink current. So when the output is high, some current is flowing through the JFET towards the 2.5V line, causing it to peak. (Or at least that's the thought. In my simulation the current through the JFET is way less than other current draws, so total current should never become negative)
What I should do for the next revision is to pick a proper voltage reference that can sink current as well. As a stop-gap measure, I attempted to put a 1k pull-down resistor on the LDO to keep it at 2.5V, but this does not seems to have completely solved the problem. I think that means either the current influx is more than 2.5mA, or the LDO is too slow, which both seem unlikely, so maybe I'm still missing something.