As the original PhiDAC dates back to 2019 and I've learned a little in the intervening time I was curious to see whether the design could be revisited.
First up - the AD8017s I have discovered are noisier than I had thought due to my ignoring the -ve input current noise contribution. They are also a bit limited by the upper supply voltage of 12V. After attending to some discussion on DIYA I wanted to see if I could build in some headroom for handling 'intersample overs' - there was none on the original PhiDAC due to the relatively low supply voltage.
TI have recently introduced some very nice (at least on paper) low-noise FET input opamps, in particular the OPA1656 and OPA1678. The latter appeals especially because its ultra-cheap. The design trade-offs with these opamps are rather different than with CFB types - their voltage noise is higher but there's no current noise to speak of so resistor values can go higher with only the resistor noise itself to be concerned about and not the opamp current noise into that resistor.
With higher working impedance the inductor(s) in the filter need to be higher value, so I have to wave goodbye to those 0805s as their inductance doesn't go high enough. P14s look to be a reasonable choice as I can get them in better tolerances than even the 5% Fastrons from a local manufacturer. Fastrons can be a useful fallback.
Higher working impedance means higher voltage swing at the DAC output - on PhiDAC the output swing was negligible as the filter impedance was ~33ohm. On this design I decided to use a 'cascode' MOSFET (aka common-gate stage) on the DAC's output - the output compliance then is limited by the breakdown voltage (and dissipation) of the FET. A 2N7002 is good to 60V but we won't need all that as opamps peg out around 36V typically. The cascode also means no level-shifting circuitry is needed on the DAC itself.
Noise and noise-gain simulations have revealed that the MFB type output filter I'm using isn't the quietest - a Sallen-Key design shows lower noise gain for the opamp and hence should be lower noise in practice.
Several listening experiments revealed that higher filter impedances made for a more dynamic sound - these listens though were done on the 'Deca DAC' with its bipolar opamp and multiple paralleled chips. With higher resistor values there is a limit to how much current we want from our DAC chips before we exceed the standard 2VRMS signal level. The OPA chips have an inherent voltage noise roughly equivalent to a 1kohm resistor so going lower than this seems counter-productive in the I/V stage - this sets an upper bound of 6 chips as 6mA*1k gives 6V peak-to-peak output. As to the lower bound, I was curious to hear how a single chip sounded so I built a single TDA1387 prototype for a listen. I'll report on that in the next log.