A proper reset for the double-coil latch

A project log for YGREC8

A byte-wide stripped-down version of the YGREC16 architecture

Yann Guidon / YGDESYann Guidon / YGDES 11/09/2019 at 07:350 Comments

A DPST relay can be emulated with two SPST relays, with their coils in series (one coil replaces the pull-up resistor so energy efficiency is increased). However there are two problems :

The first problem is somehow "easy" to solve with the YGREC8 : the inverted value will go to SND because there is a XOR/inverter in the datapath. We just need to invert "in the other case".

The 2nd problem is solved by a diode, connected to a common /RESET rail that is momentarily connected to 0V during the power-up sequence. This means more diodes, but the power-up sequence can be shorter than some code scanning the register set and writing to each of them...

I just tested my system with the RES64 and it works well. The only problem is the capacitance of the RS flip-flop, the 47µF capacitor I tried is too large and 5µF would be good (a discharge time of 10ms) though I can't find the appropriate part.

The discharge time will determine the max. switching frequency (?), I think 10µF would still take a full clock cycle to discharge at 50Hz, and nothing prevents us from aborting the discharge. So I ordered more Russian 10µF tantalum caps.

This is also interesting because the much higher resistance of the RES64 coils keeps us from having to use large capacitors for timing purposes. For example, the POR (Power-On-Reset) could be controlled by a large capacitor (1000µF ?) discharging in a coil...

Experiments have shown very interesting results... Such as a 100µF capacitor with an internal 6K Ohms resistance ???

Because of this leakage current, the sensitive timing relay was still partially energised and wouldn't turn off after the RC time... Check your parts before using them !!!

No trick, I swear !

I make a 2-relays POR circuit now... Here is the schematic :

I botched the manual reset, is should be a SPDT switch so the 470µ capacitor is discharged fast (through 200 ohms or so).

The output has a weak pull-up resistor to backwards-bias all the diodes and (hopefully) reduce the crosstalk between all the latches.

3 more diodes help with discharging the capacitor or to prevent reverse-charging.

The 470µF cap provides a good 1s pulse.

The output RES64 could be buffered with more and stronger relays (like 3×RES15)


The only problem is with the voltage trigger : this voltage changes with time and self-heat... I'll have to find another system.

Oh and the trigger voltage varies with the ramp-up speed...

But this system is still more reliable than nothing. And I can select how many Ge diodes are in series to tune the voltage.

Another challenge : how do I detect that the voltage has dropped below 5.5V ?