The previous log 139. Carry on made the case that a prefix would be necessary to solve a pretty difficult problem caused by the lack of opcode space.
Such a prefix would eat some of the INV opcode space that is reserved so far. It's only a tiny dent though, and there is some room. So why not have a more potent prefix opcode ?
The prefix could select the source of the carry bit, for example, so we can reuse the whole condition logic and corresponding fields (that's 4 bits though I'm not sure all will be useful). This value would be latched only for the next instruction. That will make exceptions very fun to handle.
The prefix can also change the destination for the next instruction, to make YGREC8 a semi-2R1W architecture when needed (this could relieve some pressure during coding). So the SND field will be latched for later.
I have no idea what the I/R, I/R2 and SRI fields could be used for, so far.
- I/R should not be touched, to keep the INV opcode. But then we lose an IMM8 at least.
- SRI does not seem to have valuable information so far. Not sure it could hold MSB of IMM4 value.
- I/R2 could select a different prefix. Some reserved opcodes will be required to return from exceptions for example.
The first prefix uses 2 existing fields and leaves 3 bits in the middle.