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Assembly language and syntax

A project log for YGREC8

A byte-wide stripped-down version of the YGREC16 architecture

Yann Guidon / YGDESYann Guidon / YGDES 01/01/2018 at 04:300 Comments

(now it's a bit obsolete)


So far, there is a short introduction to the YGREC8 assembly language in 7. Programming the YGREC8, which focuses on the syntax and structure of the instructions. The valid combinations are :

But a program in assembly language needs more than instructions. Classic asm listings have

For example :

; file example.y8
; example source code

.org 42 ; sets the current assembly address to 42
mylabel:   ; creates the symbol called "mylabel"
                  ; and gives it the value of the current position, that is: 42
somevalue: 23h ; creates the symbol somevalue and gives it the value 23h (=35)
DB somevalue ; injects the value 23h into the current assembly stream

MOV PC, mylabel   ; jumps to the address mylabel

I'm being lazy with the labels, with dual use as symbol declaration, because it saves some code.

The YGREC8 also provides a new kind of instructions that are used only in debug/trace/development mode through the TAP (Test Access Port). These "para-instructions" are not directives but get encoded alongside the normal instructions. They command key internal signals to control start/step/stop, read or set debug registers, report the values of the buses...

The resulting code sequence is then interpreted by software that sequences the various simple signals and events to provide sophisticated debugging and internal testing functions. This mode is enabled only when the proper directive is invoked at the start of the code listing.

For example the following sequence will dump the values of all the registers :

; file dumpReg.y8p
; /!\ syntax is subject to change !
.PARA

STOP  ; in case the core was not stopped before
ASM AND A1 D1
REPORT "A1=" DST " D1=" SRC
ASM AND A2 D2
REPORT "A2=" DST " D2=" SRC
ASM AND R1 R2
REPORT "R1=" DST " R2=" SRC
ASM AND R3 PC
REPORT "R3=" DST " PC=" SRC

Such simple sequences can be created to examine and change the contents of :
 - the instruction memory
 - the data memory
 - the registers
 - the I/O registers
 - the debug/trap/breakpoint registers
 - ...

To reduce complexity, the same assembly routine is used for normal assembly or para-assembly, in interactive prompt (dynamic use) or batch mode (to process an assembly file).

Writing such a powerful assembler in VHDL is going to be quite a challenge so please be patient ;-)

And happy new year !

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