It has been a long time
I got the new board made, and failed again. Worse this time, it was bi-stable and same fault.
I had a good look and found the design fault. Basically I need to latch the old state and do the operations before setting the new state. I could not see an easy fix. Yes I could code around the fault but it would be messy.
Redesigned from scratch
1 Keep the basic reset and clock (why not):
Don't worry about the duty cycle, that is because the Tina 74LS132 is not a schmitt trigger and the patched schmitt trigger is TTL only.
2 Generate a "Clear" signal that is a cleaned up the "Clr" signal.
3 Generate a two PHASE clock (low for setting the symbol and high to move the tape):
4 Decode the new instruction.
Here is the instruction decode mapping. Phase is from the Reset/Clock logic, Write, M0 and M1 are from the Flash ROM, and S1 and S1 are for the shift registers:
Basically the logic set the
This simplifies to:
And here is the decoder honours the Write signal when the PHASE signal is low, and the move signals (M0 and M1) when PHASE is high:
Now the above will not make sense to you unless you have had some experience with logic design. I used "LogicFriday" to work all this out (if your interested).
I started writing the Finite State Machin (FSM) code and I realised I did not need the WRITE signal, so my decoder was over designed. Here is the updated version
So the updated decoder truth table is:
And the new schematic:
I need to let the dust settle on the design and the recheck it.