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Keyboard Timings

A project log for The PCW Project

Doing things with an Amstrad PCW

James Ots 11/21/2017 at 22:420 Comments

I was reading John Elliott's keyboard protocol information, and noticed that he says that he didn't know the exact timing for the keyboard. So I thought I'd find out, and connected a PCW keyboard up to my logic analyzer.

I was interested to find that although the overall idea is as he describes, the fine details of the wire protocol are actually a little different:

I tried three different PCW keyboards (all from 8256s), and they all had the same timings. The values transmitted did match John Elliott's description.

I imagine the actual timing of this is fairly irrelevant though — so long as the clock signal is within certain tolerances I would guess that the gate array just clocks the signal in on the falling edge of the clock.

So here's the output from the logic analyser, with some times added. The times seemed to be fairly consistent, but I should probably have used fewer decimal places. The overall time of a transmission of the keyboard state (top chart) should be pretty accurate though, as I took the time for 50 transmissions and divided it down, and the time for one row of transmissions (second chart) was also averaged from 8 transmissions.

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