Close

RadioHead RF95 Driver / Low Data Rate Optimization

A project log for ESP32 - LoRa - OLED Module

Get the most out of your (heltec/ttgo/aliexpress) ESP32 LoRa OLED development board

datadata 10/24/2017 at 03:282 Comments

Digging somewhat deeper into the RadioHead driver, I noticed an issue with the predefined ModemConfiguration parameters. The third configuration register (0x26) is always 0x00. This is, how they are defined in RH_RF95.cpp:

PROGMEM static const RH_RF95::ModemConfig MODEM_CONFIG_TABLE[] =
{
    //  1d,     1e,      26
    { 0x72,   0x74,    0x00}, // Bw125Cr45Sf128 (the chip default)
    { 0x92,   0x74,    0x00}, // Bw500Cr45Sf128
    { 0x48,   0x94,    0x00}, // Bw31_25Cr48Sf512
    { 0x78,   0xc4,    0x00}, // Bw125Cr48Sf4096

};

Now, I found in the SX127x application note ( http://www.semtech.com/images/datasheet/an1200.24.pdf ) that the third register 0x26 has two functions: AGC and Low Data Rate Optimization. The later being mandatory for spreading factors >= 11

So for a Sf of 11 (2048) or 12 (4096), it should be set. The predefined configuration for Bw 125kHz, Cr 4/8 with Sf 4096 should actually read    { 0x78, 0xc4, 0x08 }

Also keep this in mind when creating your own configuration parameters.

Discussions

Mike wrote 02/06/2018 at 17:38 point

The semtech link is unfortunately broken. So I'm not sure if we are looking at the same document.

I found  https://www.semtech.com/uploads/documents/sx1272.pdf

But in there the description of register location 0x26 is "Reserved" when in LoRa mode.
So I don't know why Radiohead even bothers with it.

The setting you were concerned with, LowDataRateOptimize is bit 0 of 0x1D.

-Mike

  Are you sure? yes | no

data wrote 10/25/2017 at 21:08 point

[update}
Having posted this issue to Mike McCauley, maintainer of the RadioHead library, it will be addressed soon...

  Are you sure? yes | no