Creating Logic Glitches, Intentionally

A project log for Microhacks

A collection of small ideas

ted-yapoTed Yapo 12/19/2018 at 03:210 Comments

Glitches are bad. Don't let them ruin your logic design. But if you're really making an analog circuit which needs a short pulse, maybe glitches are just the ticket. In this case, the "classic" glitch generator produces 1.33 ns pulses using a 74AC02, because that's what I had on hand. The edge rates are a respectable 700 ps (rise) and 650 ps (fall).  That's not bad for a through-hole part.

The circuit is the same one they tell you never to use in your logic designs - it will surely mark you as a newb.  Go ahead and do it anyway.

A trigger pulse is supplied from an external generator.  A first NOR gate is used to buffer the signal, while a second delays and inverts the pulse.  The difference between the inverted/delayed edge and the original signal drives the output NOR high for a brief period - the propagation delay of the middle gate.

This delay varies with voltage and temperature, so the pulse width will, too.  But if you just need a pulse near the correct width, this might be good enough.  For longer pulses, you could add more gates or a simple RC integrator in the delay path.

The whole thing is dead-bugged on some copper clad.  All my circuits look alike - ugly.

I don't think that ringing after the pulse is due to poor termination.  The circuit is pretty compact, and the line to the scope is terminated at both ends.  Instead, I think this is the classic ground bounce issue associated with the 74AC series.  If you zoom out, you can actually see the same "ringing" happening at the falling edge of the trigger pulse, too - even though there's no output generated at that point.  It's clearly visible (9th division below) and has the same shape as the ringing after the output pulse.  The time between the two is around 62ns (the trigger pulse width), and I sure don't have any 30 foot cables in the setup. Is this just ground bounce from the other two gates switching with the falling edge of the input pulse?