The designer told me that this board was far harder to design than more advanced processors like the 68020. It stretches the clocks for various reasons:

• Memories of different, but fixed, speeds.
• STEbus access of unknown speed.
• I/O chips that require fixed clock rates.

The Motorola 68B09E is an NMOS device and a  dynamic design, so the clocks cannot be stretched beyond 10μs. So this board limits STEbus accesses with a timeout of about 8 microseconds.

The Hitachi 63C09E is a CMOS device, but also dynamic. The minimum clock rate is 0.5 MHz, so so the clocks cannot be stretched beyond 2 μs if this CPU chip is fitted.

The I/O chips need a fixed clock rate (E) to generate baud rate clocks and general timing. This board solves this problem by having separate clocks for the CPU and the I/O chips. The board stretches the CPU clock to synchronise with the I/O clock when accessing I/O chips.