I had a think, and note that most of the control signals are exactly the same as the Z80. So rather than invent a new board from scratch, I could simply wire the Z180 to the CPU socket of an existing Z80 board (like the SCPUB board),

GND, VCC, D0-7, A0-15, !WAIT, !BUSAK, !BUSRQ, !RESET, !NMI, !HALT, !RFSH, !IORQ, !MREQ, !M1, !WR, !RD are identical, and can wire directly to the Z80 socket.

RTS0, CTS0, DCD0, TXA0, RXA0, CKA0/DREQ0, TXA1, RXA1, CKA1/TEND0, TXS, RXS/CTS1, CKS are serial port signals that can connect to FTDI USB cables or serial port drivers.

A16-A19 are new but uncomplicated, just extra address lines. They would have to go to large memory chips via flying wires.

Z80 CLK of Z80 --> EXTAL
PHI is the CPU clock output.

Z80 INT --> INT0
INT1, INT2 are extra interrupt lines, not needed yet.

DREQ1, TEND1 are for DMA which I can ignore for now.

E is for Motorola peripherals which I don't have.

ST works with !HALT and !M1 to indicate CPU state. New states are DMA, HALT, and SLEEP.

XTAL (crystal drive) is not used because CLK is driven.

This doesn't look too difficult to deal with.

Transplanting the Z180 into the existing SCPUB board could be done without having to re-write the serial port drivers. There is no reason why the existing SCC chip must be replaced by the Z180 serial ports. The BASIC interpreter ROM can continue to use the SCC.

For a completely new board, one would want to do without the SCC for reasons of economy but I shan't be doing that just yet.

2020-07-09

Had an idea. I could join a Z180-to-RC2014 board to an RC2014-Z80 board to get a Z180-to-Z80 adapter. It would save me hours of hand-soldering many wires, and it can be readily recreated.  So I ordered them.

It then occurred to me that most of the pins are address and data, which go to the memory sockets, which have most pins in common with my STEbus Z80 board's memory sockets. Add power and ground, that is 26 pins. Still leaves 14 pins to wire to the Z80 socket. I think I will go with the two-stage adaptor idea. If nothing else, the first stage might let me drive RC2014 boards from the host board. Not elegant or robust, but okay for experiments.

2020-07-10

The SC130 Z180 board arrived.

2020-07-13

The Z180 board was quickly populated with resistors, capacitors and sockets at lunchtime. I aim to get it running on its own first, as a basic sanity check. I am short of a reset chip, 74LS688 and a 74LS139. I will have to borrow them from other projects.

2020-07-14

The SC108 Z80 board arrived.

2020-07-15

Boards joined together. Quick buzz-check, the power, ground, D0-7 and A0-7 are correctly connected between the memory sockets of one board to another, so I am confident most other pins are. One critical issue is that the STEbus board uses the /WAIT pin to make the CPU wait while the STEbus cycle is in progress. The two RC2014 boards both tie it inactive high to 5V. These had to be isolated from 5V and joined from board to board. Amazingly, the RC2014 bus does not include this signal! The STEbus board uses /INT for the DART and CTC, and /NMI can be driven from the bus. The SC180 board ties both high, so that needs dealing with.

The conjoined boards were photographed, and the photos added to the project gallery. 

First step will be to see if the STEbus board and Z80 will work with the adaptor kludge boards between them. 

2020-07-22

The Z180 uses addresses 00-3F for on-chip peripherals, which conflicts with the host board's I/O map. So the host board logic will need modification. The SC130 has a full memory map, 512K RAM and 512K ROM. This leaves no room to access the STEbus memory space. I have fitted 512K RAM (KM684000BLP-7L) and have some 256K ROM (AT49F002T70PC). The SC130 firmware (ROMWBW) is 512K, I will see if it really needs all that space.

Since it is easier, cheaper and faster to fit large memory chips on board, the STEbus is rather redundant for memory expansion. Bus memory space is only really needed for memory-mapped peripherals such as graphics boards, and those are hardly needed now that most people have a PC to use as a terminal.

2020-08-09

Ordered 512K Flash ROM chips to store the ready-to-run firmware. This is cheap and avoids having to find out how to fit it in a smaller ROM. I don't want most of the stuff on ROM disk - like two BASICs and FORTH. Just one BASIC will do, ideally BBC.

Reconsidering the Z80 adapter idea. Most of the stuff on the SCPUB will not be used (ROM,RAM,CTC,DART) and there is no USB-FIFO module. Might be better to make a board with just the bus buffers, USB module and glue logic GAL chips.

2020-08-13

512K Flash ROM chip arrived. Programmed and fitted, with 8MHz oscillator. The ROM expects 18.432 MHz so the baud rate is wrong (43% of ideal). Mangled characters are seen at the PC, so perhaps all else if okay? 9.8304 MHz also fails (53%). I fitted an 18.432 MHz chip on the off chance it might work, and it did! Very pleased, it shows the there are no serious faults in construction. 

2020-11-17

Ordered two Z8S18033VSG from Mouser. This is so I have one rated at 33MHz, for clocking at 32 MHz (or 29.4912 or 31.3344 for exact baud rate divisors). This may be pointless if one has to insert wait states for slower memories.