Beginning to Integrate the WM8731 Codec

A project log for Software Defined Radio (SDR) In An FPGA

Building blocks for creating a software-defined radio (SDR) in an FPGA

joesugarjoesugar 09/28/2014 at 01:090 Comments

I've  been working on a block to interface with the WM8731 audio codec.  The  protocol used to send data to the chip is straightforward but I ran into a problem I didn't anticipate.  The codec board I'm using (an Arduino Audio Codec shield) has it's own oscillator and no easy way to synchronize it with the Papilio oscillator.  This makes it difficult to create clocks with the proper timing to send data to the codec.

The solution I decided upon is to feed the CLKOUT signal from the WM8731 back to the Papilio and use it to create the sample and data clocks.  However, this means the the audio data going between the Papilio to the WM8731 is crossing clock domains.  The accepted solution to this is to use an asynchronous FIFO between the domains, so I've spent the last week getting one to work to my satisfaction.  Now it's time to start working on actually sending data to the codec.