First Steps

A project log for Software Defined Radio (SDR) In An FPGA

Building blocks for creating a software-defined radio (SDR) in an FPGA

joesugarjoesugar 09/19/2014 at 13:050 Comments

I finally decided to start work using the ZPUino Hyperion variant for the LogicStart MegaWing to take advantage of the HQVGA driver.  Also, there are other peripherals on that board I may take advantage of later (e.g., high-speed A2D) and Mike Field has made available a free book (Introducing the Spartan 3E FPGA and VHDL) for learning VHDL with the LogicStart MegaWing that can be used for reference.

I've integrated the I2C driver into the ZPUino code and pushed it up to the repository.  There are a few idiosyncrasies to using it whose resolution I've described I2C for the ZPUino.  Also, I had to make a couple of changes related to bus widths but nothing significant.

The next step is to start integrating an audio codec driver.  I decided to use the Wolfson WM8731.  This is the chip used in the Arduino Audio Coded shield so libraries exist to access it from an Arudio-like environment.  Also, I've already run across some examples in vhd/verilog so I won't have to start completely from scratch.