Close

Schematic R1 released

A project log for Open Source HW: Xilinx ZYNQ7000 System on Module

75x40 mm, 6 layer PCB, Xilinx XC7Z7010 FPGA, dual core ARM Cortex-A9, 32Mbyte Flash, SD, microSD, Bluetooth, 100 mil headers, single 3.3V

Antti LukatsAntti Lukats 12/16/2014 at 18:560 Comments

Revision 1 schematic released, uploaded to opencores. This is our "ups" version we never intended to produce it, but it happened. R1 is fully working, but we one production run was manufactured for early adopters.

Discussions