I think that the world needs exactly what you describe! However, to my knowledge, the parallel programming algorithm/interface for these CPLD is proprietary and not readily available. If you find the Altera programming documentation that describes the algorithm and pulses, I would be very happy to collaborate with you on a “CPLD eraser” to free up the JTAG pins. 

Could you improvise a parallel programmer using something like an Arduino? Anyone who'd work on this project is surely going to have a couple of 'weenos hanging around. It's a chip where you can set the GPIO pins to essentially anything, at all sorts of clock rates. I presume the CPLD isn't too fussy about it's clock rates either, I imagine it's a lot like a state machine. So you should be able to switch it's JTAG pins back on again. Would be worth keeping one on hand, if you're going to be buying second-hand CPLDs a lot. Even if it just re-enables JTAG with the press of a button and shows success with an LED.