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MIPI DSI Display Shield/HDMI Adapter

A controller for LCD/OLED screens with MIPI DSI interface. Arduino shield format, HDMI-to-DSI adapter & built-in framebuffer.

twl
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A simple controller for MIPI DSI displays, based on a Xilinx Spartan-6 FPGA.

MIPI DSI is a high speed packet-based interface for delivering video data to LCD/OLED displays. In a way it is similar to DisplayPort, with a more power-conscious (and thus complex) physical layer. DSI is mostly used in mobile devices (smartphones & tablets).

I started this project as the base for building a low-cost HD projector. Later on I realized it could be also useful for VR applications and as a general-purpose graphics card for small uCs - that's why it comes in Arduino shield format.


Features

  • Supports 3/4 lane MIPI DSI displays.
  • DSI controller supports resolutions of up to 1080x1920 at 60 Hz refresh rate.
  • Converts HDMI video to DSI - letting you connect any MIPI DSI screen to your PC, Raspi or similar devices. Conversion works up to 720p@60 Hz or 1080p@48 Hz.
  • Built-in framebuffer with simple graphics stack, allowing to interface small microcontrollers, such as Arduino through 8-bit parallel or SPI busses
  • Sub-$50 BOM, including 4-layer PCB (@100pcs).
  • Powered through mini USB connector.
  • Embedded 32-bit CPU, available for user applications.

Project history

  • 12/2013: Schematics & PCB done.
  • 12/2013: Initial version of the firmware, works with Iphone4/4s screens on a FPGA dev kit.
  • 02/2014: Got the PCBs and components.
  • 02/2014: Test PCB assembled, drive both 3- and 4-lane screens.
  • 07/2014: Started work on HDMI <> DSI conversion.
  • 08/2014: HDMI convesion working for 640x960 Iphone4 screen.
  • 08/2014: DSI core achieves 1080p @ 60 Hz (48 Hz with HDMI conversion).
  • 08/2014: Rev 1.1. PCB design, schematics and firmware released.
  • 06/2015: Prototypingr rev 2.0.

To do

  • Arduino interface/drawing commands (depending on demand).
  • Test external HDMI decoder with displays larger than 1080p.
  • Port Doom to run on the softcore CPU.

Hardware

The diagram below shows the main blocks of the design:

  • The FPGA: Xilinx Spartan-6-SLX9. Highlights: amateur-friendly TQFP144 package and built-in SerDes rated up to 1080 Mbits/s. The FPGA does pretty much everything in this project, hosting the MIPI DSI core, framebuffer controller with DDR memory, HDMI/DVI decoder. Everything is managed by an embedded Lattice Mico32 CPU.
  • DSI Level adapter: a bunch of resistors interfacing the FPGA's 1.8 V SSTL/LVCMOS I/O to DSI levels. More info in the FPGA section.
  • DSI connector: a standard 2x15pin 2mm pitch female connector with all DSI signals, power supplies and some GPIO pins for interfacing with the display. Since connector pinouts differ between displays the idea here is to use a tiny adapter board hosting the particular LCD's connector and its wiring.
  • DDR SDRAM, providing memory for the framebuffer, since most smartphone DSI displays don't have one.
  • HDMI input: slow version, using FPGA's ISERDES blocks (up to 1080p @ 48 Hz) or a fast one (1080p @ 60 Hz), based on Analog Devices' ADV7611 chip. The external HDMI decoder shares some pins with the SDRAM chip and the host interface, so the full HD - 60 Hz version can only work as a HDMI to DSI adapter.
  • Host interface: 12 pins wired to Arduino shield's IOH/IOL headers. Exact functions are not defined yet, I'm thinking about a 4-wire SPI interface and an 8-bit parallel bus.
  • USB UART a CP2102 chip providing USB UART, software bootloader and JTAG functionality for the FPGA.
  • Main power supply: integrated PMIC (TI/National LM26480). Voltages are: +3.3 V (HDMI input, USB, host I/F), +2.5 V (SDRAM and FPGA Vccaux), +1.8 V (DSI), +1.2 V (FPGA core).
  • LCD bias/backlight power suply: Most displays need some higher positive/negative votlage to operate. The board has a simple DC/DC converter for that purpose, producing symmetric voltage of up to +/- 6 V. The voltage can be adjusted for the particular panel by connecting a resistor between one of the DSI connector pins and ground. There is also a separate current driver for backlight LEDs, programmable by another resistor. Both DC/DC converters use a TPS61041 chip.

PCB Design

The DSI shield consists of two PCBs - the main board, where all the cool stuff is and a small adapter board, usually different for each display, connected through a 30 pin 2mm pinhead.

The main board is a typical Arduino shield. I routed the design on 4 layers, with the signals on the 2 outer layers, a contiguous ground plane and a split power plane. The DDR is placed right under the FPGA to simplify routing. SSTL to DSI level translator resistors are placed right next to the FPGA output pins to avoid stubs. All differential pairs are calculated for Z0=100 Ohm.

The adapter boards simply route the...

Read more »

  • 1 × XC6SLX9-4TQ144 Spartan-6 FPGA
  • 1 × LM26480 Power Management ICs / Switching Regulators and Controllers
  • 1 × CP2103 Interface and IO ICs / USB
  • 1 × M25P80 Memory ICs / FLASH Memory
  • 1 × Molex 500254-1927 (or similar) HDMI SMD connector
  • 1 × Mini-USB type B connector
  • 1 × 2x15 2mm pitch female pin head
  • 2 × TPS61041 Power Management ICs / Switching Regulators and Controllers
  • 2 × IP4292CZ10 ESD and TVS Suppressors / ESD and Transient Voltage Suppression (TVS) Diodes and Arrays
  • 1 × ADV7611 (optional) 1080p HDMI receiver

View all 11 components

  • Rev2.0 prototypes arrived

    twl08/18/2015 at 16:10 26 comments

    I've received a couple of Rev 2.0 prototypes. Iphone4 display is working fine, still waiting for Optimus E980 connectors though...

  • Revision 2.0 & commercial availabilty of the boards.

    twl06/21/2015 at 23:08 26 comments

    Hi all,

    The prototype of Rev 2 PCB (see below) just went to production.


    Some news:

    - Boards will be manufactured and sold by Creotech. We are targeting $99 (+ taxes/shipping).

    - Rev 2 board will support resolutions up to 1080p/48 Hz and work by default with Iphone4 and LG Optimus E980 displays. For other screen types (AMOLED Galaxy S3/S4, Iphone 5) there will be adapters (available later).

    - New version will also come with a composite video input, foreseen for building FPV systems for drones/flying models.

    Note that the initial V2 release firmware WILL not work as a graphics card for Arduino. Writing a graphics accelerator is a serious task and my time resources are quite limited...

  • Commericial availability of the boards

    twl04/28/2015 at 08:43 17 comments

    Hi all,

    We've found an industrial partner to manufacture and ship the DSI shield boards. Before we start the production, we need to know how many people would be like to purchasing the boards and which display models should be supported out-of-the-box. Feel free to fill the Doodle below if you are interested:

    http://doodle.com/uv283rp366prppnt

    Cheers,

    Tom

  • Galaxy S4 AMOLED screen working

    twl04/14/2015 at 09:47 13 comments

    We have a working Galaxy S4 AMOLED screen, 1920 x 1080. A QHD screen from GS Note 4 is waiting to be tested soon!

  • First release

    twl08/16/2014 at 00:26 0 comments

    The PCB design, FPGA and software sources for the first release of the DSI shield are now available on Github.

    Enjoy!

  • HDMI to MIPI conversion working

    twl08/05/2014 at 17:37 2 comments

    HDMI to MIPI conversion is finally working, here's a video showing a Raspi driving an iPhone 4 screen.

    Freshest sources coming as soon as I've cleaned them up :)

View all 6 project logs

  • 1

    Build the hardware:

    - Make/order the DSI Shield PCB.

    - Solder it!

    - Check the BOM, as not all components should be mounted.

    - Make/order/design an adapter board for your screen.

    - Connect the two boards together with the LCD. Power the system through USB.

    - No smoke indicates probable success.

  • 2

    Clone the repository:

    git clone https://github.com/twlostow/dsi-shield

    Install an LM32 toolchain. You may find one on Lattice website. There's a pre-built version for Linux (IA32) available here.

    Download and install Xilinx ISE 14.7 Webpack from Xilinx website.

  • 3

    Build the software:

    - edit software/rev1/panels.h and set the panel type you wish to use.

    $ cd software
    $ make

    This will produce the boot.ram file that the synthesizer will embed in the FPGA bitstream. The file contains both the panel initialization/HDMI handling code and the bootloader, so the LM32 application can be re-loaded at any time via USB UART.

View all 5 instructions

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Discussions

inforfernandoalves wrote 01/11/2017 at 14:28 point

Hello again. I'm looking forward to using it with the LG Optimus e980 display. Can you tell me if it will work with the 400 ppi of the display? What about the maximum fps rate that it reaches? I live in Brazil, do you guys go here? How can I make a purchase?

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Raukk wrote 01/10/2017 at 16:11 point

Is this project Dead? aka. no longer being worked on or developed?

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inforfernandoalves wrote 01/07/2017 at 14:00 point

Hello, I liked your project and I'm interested in buying one of your prototypes. Will you sell one? How much would it cost? Grateful!

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Raukk wrote 01/10/2017 at 16:07 point

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Aditya wrote 12/23/2016 at 12:03 point

Great project man. Do anyone know of a project where a mobile motherboard can be used to output to hdmi

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SFR75 wrote 12/18/2016 at 22:48 point

Looks great! Exactly what I've been looking for ...  now ... do I need to build it myself based on BOM or it's possible to buy it from you maybe. I'm not electronic expert, but more of a digital artist.. so I would rather not build it myself :-)

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thinhleduc9112 wrote 12/17/2016 at 10:54 point

hi twl,

i'm build one right now, but how do i re-generate the dsi_pll_spartan6.v file using Coregen

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Djon wrote 12/17/2016 at 15:14 point

please tell me what this is?

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thinhleduc9112 wrote 12/17/2016 at 16:30 point

It's just a needed file to generate bitstream. I think so

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Djon wrote 12/17/2016 at 17:01 point

You, too, in ISE errors?

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thinhleduc9112 wrote 12/17/2016 at 17:08 point

I have this file, but it still errors "clk_dsi_shifted_i" in dsi_core.v file

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thinhleduc9112 wrote 12/17/2016 at 17:24 point

what is your errors?

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Djon wrote 12/18/2016 at 09:03 point

YOU HAVE SUCCESS?

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thinhleduc9112 wrote 12/18/2016 at 09:37 point

not yet, I'm trying to compile the boot.ram file

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Djon wrote 12/18/2016 at 13:03 point

how success will tell me please

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thinhleduc9112 wrote 12/18/2016 at 13:13 point

i could not compile its

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Djon wrote 12/16/2016 at 16:07 point

Hello everybody! Does anyone have any ready rev1_top.bit file?

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K3GER The Great wrote 12/15/2016 at 22:14 point

Hello I am looking for some information,

Where would I buy this from and does it support the LG Optimus G Pro E980 and what is the voltage that it needs to power the screen.

Thanks.

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crY x wrote 09/10/2016 at 15:19 point

Hi, 

I just received my board from creotech, works just fine with my iPhone 4S / Raspi3, thanks for your efforts! 
But is it just me or does the board indeed create relatively high temperature, even when 'idle'? Unfortunately I could not measure the temperature yet. I am planning on running it in rather confined space and am having second thoughts whether this is a good idea. Active cooling is unfortunately not possible due to lack of room... 
Does anyone have related experiences?

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kari.kolehmainen wrote 09/02/2016 at 12:56 point

Hi, 
Very interesting project as I am trying to find a way to connect 4-lane MIPI panel (AMOLED) to either BBB or Raspberry Pi. I noticed that the latest revision in Github was v1.1, how is the later versions different/better. One thing with the AMOLED panel is that I need to build different adapter as the power lines are completely different from LCD/TFT panels. Does the latest versions from Creotech have a possibility of using custom adapter or should I stick with the v1.1?

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Andrey wrote 08/25/2016 at 22:38 point

hi you try connect touch screen?

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gordonmkc wrote 08/09/2016 at 10:42 point

Can this board read and use HDMI data which convert from MHL?

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Church wrote 07/28/2016 at 08:02 point

Hey I was reading about the TC358870XBG chip. Are there any options for driving the xperia premium 4k screen through displayport or something?

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vladimir wrote 06/11/2016 at 08:48 point

Hello, thinking of building a Sony A7s field monitor. Camera seems to support EDID and outputs uncompressed 8-bit 4:2:2 1080p, but in some Sony x.v.Color (xvYCC) color space.

Any Idea if Sony A7s would work? Please help, pro monitor is for 1200 USD

Here additional specs: http://wolfcrow.com/blog/the-sony-a7s-4k-guide-part-five-external-recording-and-data-wrangling/13/


There is very little info on Sony HDMI output. Is there anyone who have this shield working and knows somebody with A7s, to test it out? It would help a a lot of filmmakers out there. Thanks for any info.... Vladimir

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fabian wrote 06/02/2016 at 18:01 point

Hi, i saw on rev. 1 the little DSI to Iphone adapter board. is there any possibility to get only one of them ??

Thank you very much for this awesome project

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Lars R. wrote 06/03/2016 at 08:04 point

@fabian

Hi fabian,

And then? Do you have a working FPGA design for DSI? And a board that fits the connector of the adapter?

Regards, Lars

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fabian wrote 06/08/2016 at 21:24 point

well, if i understood all correctly then is his main board only an HDMI to DSI MIPI converter and the little platine on rev.1 is only an DSI MIPI to Iphone-Display adapter. if my knowledge is right then is DSI an standard and every time the same connections, so it should be possible to connect the little board (DSI to display) directly to the DSI from the raspberry pi 2/3.

if i understood something very wrong than please let me know. my apologizes then

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Lars R. wrote 06/08/2016 at 21:34 point

Could you refer to a specific image? I haven't seen such a connector on the images provided here. Only 2.54mm pin header (that might have caused some signal integrity issues and was removed because of that)

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Lars R. wrote 06/09/2016 at 04:51 point

Also, if you had such a Raspberry DSI-Iphone connector adapter, this doesn't mean that the Iphone display would simply work on the Raspberry out of the box. Just recently, the first officially supported/working Raspberry DSI display came out and it is only 800x480.

But it is among other things the beauty of the board of his project that you could connect the Raspberry to the Iphone display by connecting the Raspberry to this board via HDMI.

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fabian wrote 06/10/2016 at 16:13 point

well, i don't say that it will simply work for that i asked this little "adapter"-platine to test it ;) 

and yes the only official display only have 800x480p but if i understood all correctly than it should also be possible to connect an even bigger resolution display because DSI is an standard. 

i guess it's only an try and error but if it's working then i know that i only need to order 4 or even 5 of the main bords instead of many more for all my raspi's ;)

btw. the platine i'm asking about is in the picture gallery the 2nd one :)

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Relas wrote 06/02/2016 at 17:50 point

Can anyone buy some of them so that I can buy it on Amazon or eBay?

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Yoyoweb Yal wrote 06/02/2016 at 07:26 point

can anyone tell me where to buy this stuff ? By sending an to createch ?! Greatwork anyway !

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ipaq3115 wrote 05/26/2016 at 21:36 point

Do you know what the latency from HDMI to the screen is? I fly FPV ( https://en.wikipedia.org/wiki/First-person_view_(radio_control) ) and there's a new HD system coming out soon geared toward low latency and fitting one of these screens you are using into some goggles might be the perfect way to use it. I imagine it's very fast but it'd be interesting to know if you've measured it somehow.

This is the HD system http://connex.amimon.com/connex-prosight

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twl wrote 05/26/2016 at 21:47 point

The latency is very low (few display lines), but keep in mind that most smartphone screens are portrait while FPV cameras are landscape. Rotation of the image (not supported yet) will introduce a lag of at least one full frame (16-20 ms).

Tom

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ipaq3115 wrote 05/26/2016 at 22:23 point

Ah, I didn't realize that. So that shot of the Galaxy S4 screen, is that rotated on your computer before going to the screen? I'd imagine that much latency wouldn't be too bad. Can't wait till you start selling it. It'll be interesting to see how well it will work for FPV.

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Lars R. wrote 05/27/2016 at 06:08 point

When thinking about goggles, image rotation is maybe not required. If you use 2 displays, which also releases performance constraints partially, then you need only approx. 50% from each FHD display in order to have a square-shaped screen for your circular optics (see current 3D goggles). Then you can rotate the cameras.

But then, once you rotate the cameras, you could also show the images of both cameras on one display without rotation. However, how to combine the data streams with the current version of the board? ( I'd prefer a 2-display-solution with more available pixels per eye anyway)

By rotating the cameras, you lose some sensor area on 16:9 image sensors in the camera but one wants to use two cameras for 3d-goggles anyway and you cannot provide 16:9 image data to single eye. At least, it is hard to do with the optics. And is there any reason other than goggles, to put FPV image data on the most smallest displays?

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Tomas Almera wrote 05/26/2016 at 05:51 point

Hi Tom, 

Amazing work. I am very interested in this project, but would like to know if it would work with any hdmi source.

For instance, the Jaguar board is what I would like to use, because it is built on intel x86 architecture, allowing for the installation of windows or ubuntu. The issue I am having is finding a nice screen to use with that so I can have a high quality interface, and your work here is exactly what I would be interested in. 

Thanks! 

Tom

http://www.jaguarboard.org/index.php/products/buy/jaguarboard/207/jaguarboard-detail.html

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twl wrote 05/26/2016 at 08:25 point

Hi Tomas,

Anything that respects custom EDIDs  (that is, almost every PC, probably including your board) should work just fine. Blu-ray players or gaming consoles will likely not work (they only support standard VESA modes).

Cheers,

Tom

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Tomas Almera wrote 05/26/2016 at 09:49 point

Hi Tom, 

Thanks for responding so quickly. I was also wondering about the connectors from the display to the board. In your demonstration video you said they were quite tiny. Is there a longer cable that can be used to connect them? 

Thanks again, 

Tomas

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Lars R. wrote 05/21/2016 at 10:46 point

Hi Tom,

the interesting value of your project is driving smart phone displays and that it is Arduino-compatible. There are many Arduino-compatible FPGA-boards out there from basically every vendor, not just Xilinx.Even the people that are currently using the Xilinx environment, might not want to dig into your design because they use just the other HDL, are not that advanced, don’t know LM32 or cannot (or want not) look into the timings of your (hdl and pcb) design.

Thus, based on what you generously currently provide, the entrance level for someone else to write a (e.g. Arduino-complatible) interface or to utilize your board in any other way than HDMI->DSI might be unnecessary high. Also, there is probably not that one and only single Arduino interface for every one, because everybody wants something else in detail.

Additionally_not just people with Arduino-compatible FPGA-boards but also people with Arduino-compatible uC-boards might like to drive smart phonedisplays and those uCs are fast enough to do so. Most of those boards already have SDRAM that could be used for a more or less
advanced generation of frames.

Thus_all that being said, would you consider providing the following 3V3interface:
RESET<-(Data of new image)
CLK<-(variable)
EN<-
DATA<-(parallel 8 bit or more if there were just more pins available)
FIFO_ALMOST_FULL->

Including a proper, fifo-based clock domain crossing. Switching between HDMI and this interface might be implemented with adding a solder bridge.
Driving_960x640 at 60fps with RGB565 and 8 bit requires 75MHz. Driving RGB332 or gray scale requires 37MHz.
What do you think is achievable when, for instance, stacking two of your boards together?

Thanks for your time,
Lars

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twl wrote 05/26/2016 at 08:26 point

Hi Lars,

I rather though about providing a framebuffer inside the shield with easy means to access it through an 8-bit parallel interface. Outputting RGB data at 75 MHz from a small MCU is not trivial, you also need to take care the synchronization between your source and the MIPI driver...

Would you like to contribute such an interface to the project?

Cheers,

Tom

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Lars R. wrote 05/26/2016 at 11:46 point

Hi Tom,

I was not thinking about very small MCUs, because there is the price and the power consumption of your board and the HD display anyway.

I am more concerned about whether the pins, in the way they are arranged now, work with 75MHz at all. Do you have experience/tests regarding this topic?

Without using a framebuffer, the source simply has to provide the pixel data fast enough and pause every time your board raises "FIFO_ALMOST_FULL". If the source does not deliver fast enough, the MIPI driver would have to fill in blanks until the source begins sending a new image "RESET/NEW_IMAGE". Due to "FIFO_ALMOST_FULL", that can easily synchronize to the MIPI driver, if the MIPI driver also has a FIFO. (In order to look "ahead" when the source finally starts sending a new image)

I would like to use your board with my graphical engine (many exist out there). The engine simply outputs pixel by pixel. I could specify the interface and color mixing down to the clock cycle and provide VHDL snippets. But I am not used to the Xilinx environment at the moment... Maybe it is a 3D-use case in the future (by using two of your boards at the same time)

A total of 14 pins (10Bit+CLK+EN+RESET/NEW_IMAGE+FIFO_ALMOSTFULL) @60MHz should be ok. Less will also do, but would love to see MORE pins available as well as a more modular approach.

Others might like a framebuffer with an arbitrarily low-speed random access. But is this a use case (6MByte per RGB-FHD-Frame)? Many will ask for a graphics engine or MCU inside the FPGA. Some of those exist already, but everybody wants something else in detail.

Best regards, Lars

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K.C. Lee wrote 05/26/2016 at 13:26 point

I would assume that those FPGA board would/should be generating the video signals, so data rate shouldn't be an issue.

@Lars R.

The Arduino pinouts are really bad for signal integrity.  There are not enough ground/return paths so it will cause a lot of crosstalk between signals caused by the connector.  The location of the few ground/power pins cause large current loops - bad for EMC.  Large voltage swings (people insisting on 5V parts) would not work well for high speed signal - larger crosstalk, longer rise/fall time - poor timing margins.

I just can't take those platform seriously as I care about signal integrity/EMC very much.

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Lars R. wrote 05/26/2016 at 14:22 point

@K.C. Lee

Yes. But in the end I would love to have something that just works at all.

E.g. a small board 3V3->DSI and a small boad HDMI->3V3. I could probably also work with 2V5. Regarding the connector, everybody wants something else. But if well-grounded 1.27mm board2board connections could manage the targeted data rates, it is still cheap, easy to use and can breakout to 2.54mm double row with ribbon cable for other use cases.

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K.C. Lee wrote 05/26/2016 at 15:15 point

@Lars R.

Look at PATA and that should give you some idea at what was involved of shifting parallel data at similar data rates. They have 16-bit data path, so they are only driving those at half the frequency.  A large part in the specs is on doing their signal integrity simulation, going to new 80-conductor cabling with alternating signal/ground pairs.  The connector is a messed up as they didn't have decent ground:signal ratio like SCSI.  

You could make life a lot easier to go with a LVDS or similar differential pairs and that can simplify the signal integrity/reduce pin counts/reduce ground requirements etc.  FPGA can easily drive those.  

A FPGA could even drive DVI at low res.  See Xilinx xapp460. 

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Lars R. wrote 05/26/2016 at 20:56 point

@K.C. Lee

Such distances, board-cable-board connections and bidirectional buses are not required here. 100MByte on 8Bit @100MHz should be possible. Running LVDS over the same 8 pins requires already 200MHz that should go over the same, bad pin header. Impedance is not getting better, but frequency doubles. Synchronizing such signals over multiple LVDS channels across vendors does not necessarily simplify things. For single ended, the connector needs additional GND pins but the FPGAs/MCUs do not.
Also, I like this project, because it is more than an Appnote. It is already tested with two very nice displays, has a board with the connectors, knows the IP core, and so on.

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