N64 PAL RGB DAC board

A small but useful board that will spark new life in my old yet still wonderful N64

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The purpose of this project is to create an easy-to-make version of the N64 PAL RGB mod. The idea is to take the digital output from the N64 video output chip and convert it in control lines and RGB analog output that will be finally added directly on the N64 video connector. Data conversion happens using a shift register as a clock feed for 4 registers connected to the video bus and to individual R2R ladders.

I want to use ready-made logic chips rather than a CPLD for three reasons:

- I do not have a CPLD programmer and that would add a big cost overhead
- I never programmed in VHDL/Verilog so that would add a big development time overhead
- I want this project to be doable by the average person that knows how to solder stuff

I'll use SOIC chips and probably resistor networks to reduce the amount of things that need to be put on the final board, which means less time involved in soldering as well as, again, more feasibility for the average person with a soldering iron.

The circuit, once you know how binary data is sent to the N64 video output chip, is pretty straightforward:

The video chip has a 7 bit wide data bus, a clock line, and a sync line; data is valid on the falling edge of the clock, data is 4 words wide, and the sync line is low on the first word, high on the others.

The first word contains 4 control lines for the video output, the three other words are the R, G and B values.

A shift register takes the inverse of the sync line as its input and it is clocked with the video chip clock; the output of the first 4 bits of the shift register is connected as a clock source for the 4 registers. In this way the 4 registers are clocked one after another, thus clocking in their data in the proper order.

The output of the three color registers is converted using a simple R2R DAC ladder.

You finally connect these control lines and analog color outputs to the N64 video connector, plug an RGB compatible SCART cable (a GCN one should do it) and voilà! RGB output is done.

  • GitHub repository created + PCB layout rev0 added to gallery

    Michele Perla04/10/2015 at 16:17 0 comments

    Hey there,

    quick update to report that I finally added revision 0 of the PCB layout to the project gallery. I also created a github repo to store the EAGLE project files.



    EDIT: my company policies won't allow push requests from my git client to the server, so I'll sync the first commit when I get back home.

  • Everything setup except for correct voltage output of sync lines

    Michele Perla04/07/2015 at 12:36 0 comments

    The layout of the board is finished, I can't upload it right now because I got that on a different PC. The only thing I'm missing (which is also missing from the original schematic) is correcting the output voltage of the sync lines to a proper TV-acceptable signal. Any suggestion? I'm posting this on the stack as well.

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Sebastian wrote 07/27/2015 at 18:23 point

Does the circuit put out the RGB signal all the time for each component or is it just 1/4 of the time while the remaining 3/4 has no signal at all?

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Hacker404 wrote 04/09/2015 at 09:47 point

PS: Altera EPM240 is typical equivalent to 190 Macrocells and the 570 is typical equivalent to 440 Macrocells. I thought I would mention them because it is hard to find 'in production' CPLD that will work with 5V0. 

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Hacker404 wrote 04/09/2015 at 09:43 point

The sync resistors aren't critical. I have a Papilio one that uses series 82.5 Ohm resistors. The Papilio is a Xilinx 3E and I think it is 3v3 IO. The spec says TTL from a 75 Ohm source so you could use 75 Ohm resistors. Anything from 50 Ohm to 100 Ohm won't give problems. 

I have a lead here that I use with a XC9572XL and I think I just used 100 Ohm resistors in that. Correction, just pealed the heat shrink off it and it's a 56 Ohm. I have been using that with Xilinx XC9572XL, Altera EPM240 and EMP570 (3V3 IO) and I haven't had problems. Just make sure you have the sync polarity right for the standard you are using. 

I am assuming you will be driving the sync from the 3V3 IO of the CPLD. If you want to drive from a TTL (5V0) chip then I would go higher than 75 Ohms, perhaps 82 Ohms or 100 Ohms. 

If you end up needing more gates then I suggest the Atera EPM240/570 but there a min 100 pin (QFP100 0.5mm) unlike the XC9572XL / XC9536CL that you can get in QFP44 or PLCC44/84. The Atera chips is much the same - 3V3 IO that is 5V0 tolerant. Altera programmers are cheap to. 

Can I ask ... where did you get the VHDL for the standard 74xx series chips? Is there a library somewhere? It would be handy for me sometimes as I am a VHDL newbee and seeing the old chips would help. In some VHDL I did recently, I couldn't get an asynchronous register load to work. It would be good to see how it was done in the basic 74xx series. Thanks.

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Michele Perla wrote 04/10/2015 at 16:04 point

Hey there, thanks for the well though clarification. I am not going to use CPLDs actually, I'd rather use discrete 74xx logic chips. What you see in the black background schematic is actually took from EAGLE CAD. As stated in the project description, I'd avoid CPLDs to let (me and) other people to just print a board, buy the chips (in a convenient TSSOP package) and the passives, solder everything and that's it. This avoids the need for a JTAG programmer and should make the soldering job somewhat easy. Anyway, the discrete chips indeed have 3V3 outputs and I'd drive the SYNC lines from the registers outputs. Also note that I will use SCART RGB cable but I still have to understand if I have to put 75 Ohms resistors to ground for video and sync signals (like a PAL SNES cable) or 220 uF capacitors in series (like a PAL GCN cable), as shown in the diagrams at the following link:

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Hacker404 wrote 04/10/2015 at 22:25 point

For RGB signals the spec is 0.7 Volts into 75 Ohms for both monitors and TV's. It looks like your RGB outputs are currently close to TTL Voh which is much higher so you will need series resistors between each of your R, G and B outputs and the monitor connector. 

Sync is not so easy, it depends on what you're connecting to. For monitors the spec is here -

Section - Termination of Synchronisation Signal Lines; Loading
In the case of systems using the TTL logic levels as defined above, the standard termination presented on the synchronisation lines by the display device shall be a nominal 2 K Ohm to +5 VDC.

PAL and NTSC don't have a spec for sync because it is not separate. SCART specifies 0.3 Volts normal and 0 Volts during Sync.

I wouldn't bother with capacitors as the will reduce the video bandwidth and quality. They're are more for 'TV standard' resolutions. 

For ball park figures - 

Your R/2R DAC is lots of 520 Ohm resistors in parallel so I will be lazy and call the output impedance 0 so I don't have to do the math. On RGB you want 0.7 into 75 Ohms from Voh of 3V3 chips. LVTTL spec is here -

LVTTL Voh is 2.4 Volts. So your series resistor has drop 1.7 Volts so it should be about 182 Ohms. 

A little less 'ball park' - The R, G, B, voltage for 111111 will be Voh * 127 / 128 which means that 'all the other resistors' add up to the ground resistor (560 Ohms) divided by 127 ie 4.41 ohms so take that from 182 Ohms and you're left with about 178 ohms. 

Now reality lol. A Voh of 2.4 Volts is a minimum (worst case) measurement and a typical value would be more towards 3.3 Volts so your series resistor should actually be higher in value. I would *guess*, 220 to 270 Ohms Ohms as no 'typical' value of Voh is specified. If the voltage going into a monitor is slightly high then the monitor will correct it (a little). 

Sync series resistors only need to me *about* 82 Ohms, like I mentioned anything from 50 to 100 Ohms would be fine. You don't need shunt resistors (to ground) for any of the signals. 

In reality, the input impedance to a monitor is 100 Ohms more often then it is 75 Ohms You can measure it with a meter then the monitor is unplugged from power.

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