Removed the cape EEPROM as it wasn't being utilized. All the configuration is handled in the BeagleLogic system Image.
Added a DS1307 RTC to keep time so that logic captures can be correctly timestamped. This will be reflected in the software as well.
Add a LDO with 3.3V / 1.8V select on Input side for configurable logic level thresholds. BeagleLogic should also be able to tolerate +/-12V logic signals, will be working out the best way to make it happen.
Stay tuned for more rev2 updates!