32-bit RISC CPU

An idea for a 32-bit superscalar dynamic execution CPU with support for SIMD (int and float), Floating Point, and Integer Arithmetic

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This is an architecture inspired by the PowerPC 970 with some of its complexities removed (dynamic execution more like a 7400). I left some of the branch execution to the programmer to avoid complex branch prediction, and so that the pipeline would only have to worry about data hazards. A branch's instruction is quickly decoded and used to fetch the next instruction, thus eliminating pipeline bubbles and the need for ridiculous dynamic execution to avoid such bubbles. However, this leaves a problem for the programmer because if the programmer had an instruction to compare two numbers and store the result in the flag register with a branch immediately afterwards, the branch would be looking at old data. As such, a programmer must write the comparison instruction several instructions before the branch, either with noops or arithmetic in-between. I may eventually attempt to build this in Logisim.

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Reed Foster wrote 09/16/2015 at 04:46 point

Hi @prijazendom,

This project is more of a hypothetical cpu than an actual cpu, so the only things that I have to give you are the picture and paragraph about it.

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prijazendom wrote 09/15/2015 at 21:18 point

Can I get executable ?

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Yann Guidon / YGDES wrote 12/20/2016 at 05:26 point

chmod +x prijazendom

I hope this works.

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