Note: this log was created in 2015 and may not be valid anymore. Starting January 2016 I'm going through the design process systematically and may add or change details.
The general approach will be to put the initial frequency generator, divider network, and summing op-amp on three different boards and then stack them. I want to be able to swap out the initial frequency generator if I find a design that can produce a higher frequency, and the summer is easy enough to assemble on perf board. The divider network, however, has a lot of connections and would be a mess if I used perfboard. I can also use this chance to learn how to use Eagle.
The best board house I've found so far is OSH Park, which will give you a double layer board at $5 per square inch. In order to minimize size, I'm going with surface mount components. (Imagine how much space 14 x DIP-16 packages would take up.)
This is the first PCB I've designed in Eagle, and the first double sided board. It took a while because I also had to learn how to use Eagle's part creator utility, which isn't exactly self explanatory. (Google was able to offer up a lot of useful guides.)
Since it's my first board, I would love any feedback. Are my traces too thin? Too close together? Should I not put vias under SOIC packages? Did I not account for digital signal noise enough?
I've tried to include the most useful pictures. If there's some other view that's standard and more useful, please let me know.
|JP3||Input initial frequency|
(I should mention that since those images were generated, I've moved the top right headers more into the corner, separating them from the via.)
It measures 2.63" x 1.58", or 4.16 square inches.
The first version of the board I didn't really have a strategy for making connections and it turned into a mess. The above second version I connected signal traces first, then both RESET signals, then finally the power traces. I read once that it's a good idea to keep traces on either layer orthogonal to each other, which seemed to work really well here.
Due to the high density of parts on the top of the board, some sections of the VCC plane (+5 V, top layer) were isolated from the power input (top right headers). I had to route power through the bottom layer, keeping in mind the path the current would travel from the source to each IC. Shorter paths that don't bend around components are better.
I recommend this pdf from TI for theory about pcb layout: PCB Design Guidelines For Reduced EMI
If I had to do it again, I would put the power input in the lower right corner, since that seems to be the branching out point for the top layer distribution.
The thing is, I know a lot of rules of thumb but often don't know when they need to be applied. Should the power input be moved, or is it fine where it is? Will it work as is? I'm definitely feeling my lack of experience.