The 4 spaces

A project log for PDP - Processor Design Principles

Distilling my experience and wisdom about the architecture, organisation and design choices of my CPUs

yann-guidon-ygdesYann Guidon / YGDES 03/30/2020 at 21:320 Comments

I always keep 4 independent address spaces :

  1. Program memory (read only, high bandwidth)
  2. Data memory  (read and write, as well as scrambled access orders)
  3. I/O and Special registers (serialising, one access at a time)
  4. Registers (can sustain multiple simultaneous reads & writes)

Each is optimised for a specific purpose and things get nasty when they are mixed.


Update 20240625:

That was a starting point. I now consider it "bad" to mix que control/return stack with the data space, and the latter is split in private and public areas.