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Partial register writes are tricky.

A project log for PDP - Processor Design Principles

Distilling my experience and wisdom about the architecture, organisation and design choices of my CPUs

yann-guidon-ygdesYann Guidon / YGDES 02/02/2018 at 05:222 Comments

As noted in the comments of Use registers. by @alan_r_cam, partial registers are a seducing feature. It was born in the 70s when microprocessors were 8-bits wide internally and made 16-bits registers out of pairs of physical byte-wide storage. 16-bits operations would take two cycles instead of one.

The MC68000 was 16-bits wide internally and emulated a 32-bits architecture. So handling 16 bits quantities was not a problem.

But this practice has vanished in the 80s. Speed is now really critical and whole registers are stored and handled in a single cycle. The last processors that still implement this feature are the x86 line, using "µops" to decompose the partial accesses into discrete shifts and masks. This causes all sorts complicated issues, for example the detection of pipeline hazards and all kinds of dependencies.

Avoid partial register writes. They complicate the pipeline, add latency because you insert a shifter in the critical datapath, which slows the whole CPU down. Use explicit shifts instead. The YASEP has a dedicated unit for alignment and sign extension, the IE unit (for Insert/Extract).


Discussions

alan_r_cam wrote 02/03/2018 at 00:16 point

On current ARM processors, the commands to move 8-bit values between memory and registers are:

LDRB, STRB (unsigned values) and LDRSB (signed 8-bit values)

8-bit values, combined with a shift command, create "Immediate value encoding". The YASEP unit may be similar to the explanation at:

https://alisdair.mcdiarmid.org/arm-immediate-value-encoding/

While memory can be configured as 16-bit or 32-bit, a lot of interface logic uses 8-bit registers. This leads to a related topic: do you want memory mapped I/O, or do you use ports?  Using ports (like on the Z80, 8086 etc) allows you to keep your I/O at 8-bits while your RAM is 16-bit or more. Whether you consider this a benefit depends on overall function of the final processor.

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Yann Guidon / YGDES wrote 02/03/2018 at 00:48 point

your latest topic is another excellent suggestion, thanks :-) I'll cover this soon !

I had to make this kind of choice with the YGREC, YGREC16 has register-mapped IO but this was still too heavy so YGREC8 uses IO instructions... The decision is hard to make and depends on so many factors.

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