Big strides tonight getting all (including rarely used) sections of the ADF driver working all in a nice format and verified with test board / peek at logic . Phase noise from the datasheet was a concern however simulation and testing so far it doesn't seem to be with external PA and ramp requirements. I don't plan to drive up the full PA level and everything looks good for up to 4 watts output. Made minor change to gerbers for next board spin. Swapped OSC1 and OSC2. OSC2 will do CMOS level tcxo. OSC1 will not requires .8v peak to peak. CMOS parts are easier to come by. Verified with ADF module switching between GMSK and 4FSK. Refactored ADF driver to later support UHF band optionally.