I decided to make another 'stack' with 'duino like plugin shield boards because I want to use this same prototyping platform for anther project as well and that project requires SRAM access up to 50MHz.
The general idea is to have half the CPLD boards pins go to the breadboard for slow bus speeds and the other half stack on top for the faster buses. I'm not confident at all the the higher speed buses will work on a breadboard.
So here is the start - the CPLD plugged into a breadboard.
Here's the bottom of the board -
I have put dual row pin header sockets on the top and a single rows of pins on the bottom for the breadboard. I also modified it to send 5V to the plugin boards instead if 3V3.
After I test that it works, I will swap the 50MHz oscillator over for a 100MHz oscillator.
I don't have any DIP SRAM so I bent the pins of a SOP chip in, to fit it on a TSOP to DIP adaptor -
Next I have to put SRAM and FLASH onto some boards made from Vero that plug into the top of the CPLD board.
The SRAM is 128KB.
I have to dual port both the SRAM and FLASH. The SRAM needs dual porting because it has the video RAM in it and the the FLASH need dual porting because it has the character ROM in it ... to save chip count. This is going to be a challenge for me as I am a beginner at VHDL and the Z80 is non-synchronous.