The Chameleon Arduino-compatible shield board was designed to support two general application areas: (1) soft-core processors, and (2) intelligent serial communications interface. The board was constructed to be compatible with the form-factor of the Arduino UNO. A similar design uses a form-factor suitable for use in a Pac-Tec DIN-rail enclosure. The Arduino UNO form-factor is small and popular with students and hobbyists. Although, the Arduino UNO form-factor may not be ideal for industrial applications, its small size makes it rugged enough for many industrial applications.
The small form-factor also presents a challenge. The greatest challenge in implementing the Chameleon for its intended applications was to keep the on-board features to those that would provide the greatest utility if the board was used in a standalone manner in addition to being used as an Arduino shield. In addition, although surface mount technology (SMT) would be required to implement the Chameleon, every effort was made to use SMT parts that a hobbyist could install by hand and a soldering iron. (The Chameleon board pictured was assembled by hand and a soldering iron.)
Thus, the VQ100 package was selected for the FPGA because it is the smallest QFP package from Xilinx which supports multiple FPGAs: the Spartan 3A XC3S50A-4VQG100I and XC3S200A-4VQG100I FPGAs. Interestingly, the board area used by the VQ100 package is also the same as the board area of the FG256 (BGA) package. All members of the Spartan 3A family are packaged in the FG256 or FT256 package. The BGA package will be used in more advanced versions of the Chameleon.
However, for this project cost and ease of assembly were the driving factors. Thus, only the XC3S50A and the XC3S200A in the VQ100 package were considered. Either FPGA may be used on the Chameleon. For an effective soft-core processor platform, the XC3S200A FPGA is a much better choice than the XC3S50A. The soft-core processor that I've already developed and proven on a similar FPGA development board, the M65C02, will fit in the XC3S50A FPGA. However, the complete 65C02-compatible core will utilize more than 50% of the logic and 2/3 of the block RAMs available in that FPGA. Thus, there would be few resources left in that FPGA to include on-chip RAM or peripherals such as UARTs, SPI masters, timers, etc. If the XC3S200A FPGA is used, then the M65C02 core can be incorporated along with two buffered UARTs (with 16 byte Rx/Tx FIFOs) and a buffered SPI master (also with 16 byte Tx/Rx FIFOs). This configuration of soft-core processor and peripheral uses only 50% of the XC3S200A FPGA, which leaves plenty of logic resources available for any additional peripherals or increased FIFO depths.
Beyond the FPGA, a commonly required interface for industrial or hobby projects is a simple RS-232 or RS-485 serial port. For this reason, the off-board I/O capabilities of the Chameleon are focused on serial communications. Supporting both RS-232 and/or RS-485 is a definite plus. It is not generally necessary to support software configuration of the interface's signalling protocol: separate RS-232 and RS-485 transceivers are sufficient. Multi-protocol chips such as those available from Sipex are not necessary, and a simple cable to select the appropriate channel is a much lower cost alternative. It is for this reason that 4-wire full-duplex RS-232 (TxD, nRTS, RxD, and nCTS) and a 2-wire half-duplex RS-485 are supported on the same connector.
Placing two DB-9 connectors on the small Arduino UNO form-factor for these two serial ports is not possible. Therefore, these the Chameleon's two RS-232/RS-485 serial ports are implemented using two 2x5 box headers. These box headers allow the use of low cost 10-pin ribbon cable to make the interface cables. A 10-pin insulation displacement (IDC) plug connector and a 9-pin IDC DB9-F connector can be crimped onto a low-cost 10-pin ribbon cable. The resulting cable provides a low cost serial port connection. In addition,...Read more »