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DIPSY

DIY System on Chip based on FPGA, priced below 5 USD

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NOTE all production documentation and source code in main github repo.
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DIY Yourself System On Chip, at below 5 USD pricing, hacking friendly, small and low power.

Sized 10x10mm, priced sub 5 USD (BOM price approx 1.5 USD) FPGA Module with ultra low power consumption. Easy accessible 100mil pin header style design.

Can be used "custom IC" when the FPGA OTP internal NV memory is burned or as coprocessor or accelerator for slow microcontrollers configured over SPI interface.

DIPSY

You might have hit that point when your microcontroller peripheral just doesn't have exactly the features you need:

Dipsy comes to the rescue!

It's a tiny FPGA (Lattice iCE40UL1K-SWG16) on a tiny 10 x 10 mm², breadboard-friendly PCB:

With 1284 logic cells, 7 kB RAM and a few extra goodies in this tiny package, it's the perfect addition to your already breadboarded prototype, and it can also be integrated into a pcb using simple pin headers.

Learn FPGA basics with dipsy!

Learn Verilog or VHDL with dipsy. Large FPGAs can be quite daunting, like this thing:

(picture: Keld Gydum, http://www.gydum.com/, picasa link)

and usually come in huge packages you don't really want. Dipsy is more like:


You'll quickly know your way around and the probability of meeting someone you don't even know is significantly lower.


What do I get with dipsy?

Apart from 1284 logic cells and 7 kB RAM you'll get

  • Two built-in I2C interfaces
  • a 48 MHz oscillator
  • a 10 kHz oscillator
  • IR TX/RX
  • 3x 24 mA, 1x 100 mA, 1x 400 mA LED driver
  • up to 10 I/O
  • on-board core voltage regulator

What can it do for me?

It's the perfect addition to your project when you don't want that huge FPGA, probably in a QFP144 package, with a million logic tiles when everything you need is a custom device with a few PWM channels or something similarly simple:

  • Like a servo controller.
  • Or a WS2812 frame buffer.
  • Or a device that maps your monochrome pixel data to something your color display can understand
  • Or a fast data aquisition device with a small buffer
  • Or a simple AVR core (yes, that does fit indeed!)

How do I develop software for it?

Compile your mixed Verilog/VHDL design with Lattice's iCECube 2 software. If you want you can also use other software (like Xilinx's Vivado) to develop and simulate you code first:

Do I need anything special to program it?

Absolutely not! A binary configuration for dipsy is less than 32 kB in size, so you can include it in your arduino sketch, or store it in an external EEPROM or SD card if your microcontroller doesn't have the extra flash space. dipsy can be configured with a simple SPI interface, and we even have an arduino library for that!

What if I don't use arduino?

No problem, it's easy enough to port to other environments and languages. We have tested dipsy with

  • Raspberry Pi,
  • BeagleBone Black
  • Intel Edison
  • Teensy 3.1 and LC

We're also working on a tool to program dipsy with USB<->Serial bridges.

The configuration is stored in

  • volatile internal configuration memory,
  • one-time programmable configuration memory,
  • or an external config flash chip
The first option is easiest for prototyping SPI slaves, and we currently recommend that - it's also what our arduino library does.

See a WS2812B test in action:

We also have very basic examples, starting with the classic blinky, to get you started with this FPGA board!

Five grains of Sand

All components (FPGA, voltage regulator and three passives) on the dipsy PCB are smaller than 2mm. We give you those five grains of sand to

  • Invent a new Processor Architecture and Instruction Set
  • Design a System On Chip based on the architecture you invented
  • Create a Computer or embedded system based on the SoC you designed
  • Or just design a custom peripheral for your existing project

Take the task!

Do it

NOW!

Bill of Materials

  • Lattice iCE40UL1K-SWG16
  • TLP713 LDO
  • 2x Capacitor 1 µF 0402
  • Resistor 10 K 0402
This is all you need to build a custom System on Chip, all you need are 5 grains of Sand.

System Diagram

Licenses

CERN OHL
  • Hardware design (Schematic, PCB, Production files)

The hardware license is the most important one, there are many tools and utilities and IP Cores that may have different or undefined unknown license. It is not possible to document all those use cases.

As example, the set of tools that makes the open-source FPGA toolchain is a mix of MIT, GPL, Public Domain and "missing" licenses.

AVR Basic Compiler - is fully copyrighted by Antti Lukats, but has been released under several different Company names in the past, and possible will be released under some new...

Read more »

  • 1 × PCB 10 x 10 mm!
  • 1 × Lattice iCE40UL1K-SWG16 Lattice ICE Ultralite FPGA
  • 1 × TLV713P Texas Instruments LDO 1.2V, ultra small package 1x1 mm chip size
  • 2 × 0402 Capacitor 1 uF
  • 1 × 0402 Resistor 10K

  • Refunds for indieGOGO

    Antti Lukats11/19/2017 at 17:48 1 comment

    Taking years go get myself together and refund the iGOGO project supporters. I should have done this ages ago, I know. The money was collected to company account - I would refund from my household money. Sorry folks.

  • DIPSY in Tokio, Japan

    Andrei Errapart10/04/2015 at 13:43 0 comments

    DIPSY has successfully landed in Japan and is right now watching the N700 Shinkansen passing by. Our apartment is in nearby Yokohama, thus we ourselves don't have to travel neither fast nor far.

  • Even Smaller!

    Antti Lukats10/01/2015 at 17:44 5 comments

      Measurements in millimeters!

      1. WS2812B compatible footprint
      2. DIPSY ICE COOL FPGA
      3. 256KByte SPI Flash with multiboot option
      4. 2x LDO (Core and VIO)
      5. One use LED

  • SD Card emulation, first success

    Antti Lukats09/28/2015 at 18:37 1 comment

    Using DIPSY-EPT Emulator Programmer, but the HDL code should equally well work on DIPSY too. Just got the basic SD card working, Windows does show that there is new drive with README.TXT on it..

    There is still nice piece of work to optimize the HDL code to be bit smaller and then need add functions to REFLASH the SPI, and to issue WARM BOOT.

    Then a DIPSY with spi flash connected "as SD card" would be full self contained FPGA dev system, connect "AS sd card" reflash the second image, and "restart hardware with new hard app" !

    CMD55 and response seen in LA, while README.txt is read out from ICE FPGA BLOCK RAM..

  • ANDRE's DIPSY

    Antti Lukats09/26/2015 at 13:14 1 comment

    It's saturday, I am on the way to ONION-Market with my son Andre. Hey lets go via the office, maybe I can draw some PCB there? OK!

    I had the schematic and PCB template halfway ready.

    I explaining my son, that MOST of the components are in the schematic, he looks a sec and says the capacitors are missing? Right there was no power supply cap in the schematic, I add two, and Andre finishes the PCB (routed 100% as per actual schematic).

    Done :) the routing can of course be optimized, but it is already functional as it is. Andre is 13, I must discuss with him more about the use of DIPSY in school, what they do there is so boring.

  • Stolen DIPSY's.

    Antti Lukats09/25/2015 at 17:43 11 comments

    I would like to write more and well more about the HaD meetup in Zurich, but: on my way back home in the german highspeed ttrain ICE, my backpack was stolen from the shelf about my head.

    I have still 3 DIPSY units on my desk, the remaing ones I had in the packpack. There was a lot in that backpack. Direct value between maybe bit above 3KEUR (maybe more).

    https://www.indiegogo.com/projects/dipsy-the-book/x/4524007#/story

    you can support DIPSY, if you can do so please.

    PS. DIPSY production units will be available in time before christmas, not exact ETA but they will be done with our real production machines and available in any quantity needed.


  • SD Card emulation & going ZURICH

    Antti Lukats09/23/2015 at 20:45 1 comment

    The SD card emulation IP Core, is not yet tested but at least compiled with ICEcube, and there are enough resources, so that is a good thing! Now just a bit time and it will work.

    heading out to zurich in 7 hours so see you there?

  • DIPSY in KITCHEN

    Antti Lukats09/22/2015 at 20:24 6 comments

    This is really not that we should do in the kitchen, but if needed BGA's can be soldered easily with any heat source:

    The magic is really in the flux. Any other BGA is easier than this one, to get this right you really need to have alignment precison below 200 microns. The BGA will self align itself but this tiny thing still has to be placed very accuratly.

    We tried 3 times, first time the BGA was soldered perfectly but 180 degrees wrong, the second one was possible also perfect soldering, but I did drop it, and as it was still hot the BGA did come off.

    The 3r one I did bake too short, so it did not stick, so she had to place it 4th time, and well the solder was OK and the board actually works.

    All normal BGA packages are easy to handle - do not be afraid - 0.8 and 0.5 aligne itself much better than this small thingie..

  • Files commited to github

    Antti Lukats09/21/2015 at 20:34 0 comments

    more CAD sources, DIPSY spi tool software sources etc commited to main github repo.

  • DIPSY unboxing VIDEO

    Antti Lukats09/21/2015 at 19:35 5 comments

    I have received product samples and free development boards from Silicon Blue and from Lattice Semiconductor.

    Giving something back sounded like a good idea - so I sent DIPSY and DIPSY EPT (emulator programmer tool) to Lattice.

    As an hint from Hackaday team I did not include this video in the DIPSY best product finals video.

    But I like it anyway!

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Discussions

Antti Lukats wrote 07/04/2015 at 11:15 point

1280 LUT's is sufficient for small soft-processor, so you are not limited to pure hardware design, but can create customized soft-cores that use your own peripheral IP core, or the hard-ip block in the ice ultra. I have old code that was workin in ice65, optimized AVR core with simple fast GPIO, this all can be used or re-used.

If going back in history then this FPGA is 16 times large than the first Xilinx FPGA's (XC2064), plus there are 14 small dual port RAM blocks, and two internal oscillators (10KHz and 48MHz).

This design is I/O limited and hard tailored for minimal size and max I/O at lowest possible self cost price, all components (except PCB) cost with digikey pricing below 1.50 USD. This is pretty amazing.

Caveat: if using DIPSY as "SPI peripheral" then as I/O we have 6 pins only. When using external SPI flash for booting, then we have max 8 I/O (2 are shared with spi miso-mosi). Only when the internal OTP configuration memory is blown we have all 10 I/O pins fully usable.

Still at this size and price, its not that bad.

On my personal project there is pic from the ice65 stamp that has FPGA of similar size, and does run Basic programs on the embedded soft AVR soft-processor core.

  Are you sure? yes | no

esot.eric wrote 07/04/2015 at 14:13 point

So then, when implementing e.g. an AVR... would you use a portion of the RAM for program-memory? That, then, would be loaded from an external SPI flash?

  Are you sure? yes | no

Luke Gary wrote 07/04/2015 at 15:25 point

If you have access to the avr core, why not modify it to pull instructions from an external spi flash? Im sure it wouldn't be terribly complex. you may even be able to support spm instructions. Just deal with the added instruction fetch time.

  Are you sure? yes | no

esot.eric wrote 07/04/2015 at 15:46 point

Ahh, right... entirely doable, probably, in an FPGA. These things are an entirely new concept to me. Clever.

  Are you sure? yes | no

Rogan Dawes wrote 07/04/2015 at 06:10 point

Looks interesting. What sort of functionality can you fit into this device?

  Are you sure? yes | no

Andrei Errapart wrote 07/10/2015 at 15:46 point

One could use a matrix of Dipsy-s fitted with RGB leds to implement a colourful version of Conway's Game of Life (http://www.math.cornell.edu/~lipa/mec/lesson6.html). I think it woudl be cool to fit DIPSY with an SPDIF receiver combined with digital signal filters in order to drive RGB leds on a Christmas tree to the rhytm of music.

  Are you sure? yes | no

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