Power-up RESET delay

A project log for GPS Disciplined xCXO

A DIY GPS disciplined 10 MHz reference clock

nick-sayerNick Sayer 05/06/2016 at 00:483 Comments

Well, a replacement 5680A has arrived, and it appears to be working better.

One thing that I've seen a couple times now is that it appears that the power-up RESET is unreliable. I'm inclined to believe that the most likely cause of this is that the 5680A's output is unstable for a brief period after power-up. The reason I believe this is that when it happens, just shorting !RESET to ground briefly is enough to bring it back to normal.

Well, just holding !RESET low for a couple hundred ms after power-up is fairly easy to do. It should be just a matter of replacing the connection to Vcc on the !RESET pull-up 10k resistor with the output of a buffer whose input is from an RC network with a reverse-biased diode across the resistor. When Vcc is brought up, the cap will slowly charge through the resistor, resulting in a delay before the output of the buffer snaps high. The diode is there to discharge the cap quickly when power goes away. This insures that if the power is dropped only briefly that the power-up delay will still take place.


Yann Guidon / YGDES wrote 05/06/2016 at 01:37 point

Or use a MAX809/TPS3809/your preferred vendor's RESET generator/power monitor :-)

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Nick Sayer wrote 05/06/2016 at 01:53 point

The issue isn't power stability though, it's clock stability. I don't know of any of those offhand. But in any event, this is a SOT23-5, a SOD-323 and 2 0805 parts. Kinda hard to compete with that. :)

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Yann Guidon / YGDES wrote 05/06/2016 at 02:30 point
MAX809 is just one SOT-23-3 ;-)

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