PCB Design Guidelines

Few guidelines to help in PCB layout

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PCB layout is a big domain filled with mysteries. Many big companies have SI experts to help with the design process, guiding the PCB layout engineer away from EMI harm. For the rest of us mortal humans, there are general guidelines for PCB layout that we follow in our designs. Below are some points that will help in making the design more robust and manufacture friendly.

General Notes:

The PCB design should not only be about connecting the pads together. This is the end goal, but reaching this goal should be done following guideline instructions.

  • Professional PCB designs are almost always aesthetically pleasing. This is not to be taken slightly when designing a PCB. The design should be clean and neat.
  • No matter how good you are in PCB design, there is always room for enhancements. That is why design review is a must every-time. The reviewer shouldn't necessarily have a bigger experience, actually reviewing someone else's work is a great way to gain experience.
  • Contrary to popular belief, sharp right angle corners on tracks don’t produce measurable EMI or other problems. Nevertheless, tracks should only have 45 degrees angles. Avoid the use of right angles, and under no circumstances use an angle greater than 90 degrees. The reason is because these angles just don't look good and they might cause manufacturing problems.

Zoning and Placing:

A good component placement will yield a good PCB layout. Defining the general location of all the components on the blank PCB should be done before drawing any trace. Since this is not enough, zoning should take care of grouping together components that have similar functionalities. The figure below from the TI PCB Design Guidelines For Reduced EMI shows a good component placement.

As we can see from the image, high speed logic including the microcontroller are placed next to the power supply. As we move away we start placing slower components. And at the far end we have the analog components. This will keep the analog signals clean, grouped and isolated from any interference caused by the digital signal.

Zoning and placing is not only about components. It should also be applied to power planes and signals. The power planes on a 4 layer PCB should be consistent. It is possible to divide the planes into multiple ones (for example digital and analog) but the areas should be predefined. Also the designer should make sure that the signals do no cross from one plane to another. All digital traces should go on top of the digital ground plane and similarly all analog traces should run over the analog ground plane.

As a general rule the bypass capacitors should be placed as close as possible to the corresponding pin. Series resistors should also be placed next to the micro-controller pin that they connect to. And to reduce manufacturing time and thus the cost, component orientation should be consistent for neighboring components. In polarized components, try to keep the polarity in the same direction.


PCB constraints are not there to make your life harder, actually setting up all the constraints upfront will make the design easier.

  • Keep a big clearance between PCB edge and the components/copper. All components and traces should have be spaced at least 20 mils away from PCB edge. Failing to do so might cause undesired shorts between power planes.
  • Traces should have a standard width across the whole design. Smaller traces can be used in particular areas if need be. A typical trace width would be 8 mils, this can be changed according to the design. Traces connecting power signals should be of higher width, the length-to-width ratio should not exceed 3:1 for any traces between the IC and voltage source. Typically a 10 to 15 mil trace can be used for normal power signals. For high current traces, the width should be calculated depending on the PCB copper thickness.
  • Clearance between traces should also be kept high. This will reduce cross talk and interference between traces running close to each other. Again the clearance between traces should be kept standard across the design, in my work I tend to use 8 mils clearance for traces and 10-15 mils clearance for shapes (copper pours).
  • Minimum width for silkscreen text should be set as per manufacturer standards. A good practice is to keep all silkscreen width greater than or equal to 10 mils.
  • Once the constraints are set, keep...
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  • PCB Manufacturing Process

    LazyHD03/08/2016 at 08:38 0 comments

    A good PCB design always takes into consideration the DFM (Design for Manufacturing). In order to generate a design that is ready for Manufacturing in an easy and cheap way, the design engineer must be aware of the manufacturing process. This video from Eurocircuits shows the process of manufacturing a 4 layer PCB.

  • PCB Design Tools

    LazyHD09/13/2015 at 14:13 3 comments

    Everyone has his favorite PCB Design software suite, no matter how good the software is by itself these tools will help with your PCB design.

    1- PCB Library Expert

    This tool which is IPC approved will help you designing and generating Land Patterns (Footprints) for your components. The calculations follow IPC standards and are often updated to meet the latest standards.
    You should always generate a specific footprint for the components you are using.

    Link :

    2- Saturn PCB Toolkit

    "The Saturn PCB Toolkit is the best resource for PCB related calculations you can find.
    It incorporates many features that PCB designers and engineers are in regular need of like current capacity of a PCB trace, via current, differential pairs and much more. "

    Features Include:

    • PCB Via Current Calculator per IPC-2152
    • PCB Trace Width Calculator & PCB Trace Resistance Calculator per IPC-2152
    • Bandwidth Calculator & Max PCB Trace Length Calculator
    • Wavelength calculator
    • Differential Pair Impedance Calculator
    • PCB Padstack Calculator
    • Mechanical Data
    • Minimum PCB Conductor Spacing Chart
    • PCB conductor Impedances
    • Units Conversion Data
    • Planar Inductor Calculator
    • Power Delivery System Impedance Calculator
    • Thermal Resistance Calculator
    • Embedded Resistor Calculator
    • Crosstalk Calculator
    • Fusing Current
    • Effective Dielectric Constant Calculator

    Link :

    3- FAB3000:

    This one is not free. You can try it for free but if I am not mistaken it is around 300$ to buy. This software has a lot of tools regarding Gerber Viewing and Editing, DRC and DFM and much much more. I use it to check the Gerber files generated by the EDA. I run DFM checks to make sure I didn't miss anything.

    Link :


    Thanks to @Geoffrey Hunter for mentioning it.
    NinjaCalc is "A embedded engineering calculator toolbox for doing calculations in a breeze."

    Link :

    If you have any tools that help you with the PCB design please make sure to mention them.

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Enjoy this project?



Blecky wrote 09/04/2017 at 16:19 point

I found something interesting when reflow soldering. Don't allow solder paste to get inside drill holes that aren't copper filled (for example tabs with drill holes on panelised boards). It turns out the solder hardens on the exposed sections of the holes and the internal unflown solder explodes out and sprays onto the surrounding parts from the expanding flux gases. The casualty radius was about an inch around from a small 0.3mm hole.

So if you get solder paste in there (I got it in there when cleaning off smudged solder), clean it out thoroughly. A piece of thin wire should get most of it.

If you don't, you will have spotted solder all over the place on parts and pads.

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Arya wrote 01/29/2017 at 03:42 point

Recently, there was a blog post about PCB design guidelines to minimize interference and emissions - . Not only that, but I've found this gem in the comments - It looks super useful, just has too much information for me to understand how useful exactly it is =)

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LazyHD wrote 02/05/2017 at 17:35 point

I have added all three to the project's external links...

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Arya wrote 02/05/2017 at 17:41 point

Two more to add - today I was re-reading this: and there was this site linked: , which has some very useful information on nuances of SMD and the basics (while being a site endorsing a service, it's rarely mentioned and is a very good site overall, I learned a lot).

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Arya wrote 02/05/2017 at 17:43 point

Maybe make a separate post with external links? I'd make my own and update if  if you're not against it, kind of "Arsenijs' links about PCB design and short summaries", any contributor could keep their own post here if desired (since one can't edit a post which he isn't the author of, so there can't just be a "Links" post any contributor of this project could edit).

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Arya wrote 01/20/2017 at 16:32 point

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Steven Gann wrote 09/29/2016 at 11:12 point

My current job was my first experience with real PCB design, and I've learned a lot. Probably the biggest lesson has been to not underestimate trace impedance. On a 1" square PCB, I had a 15mil GND trace going around the edge with short branches connecting to components. The result was a very unstable buck converter that needed a jumper across the board.

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LazyHD wrote 09/30/2016 at 17:23 point

When I started with PCB design I thought it was only about connecting the points however way possible. How I was wrong. And now the more I learn the less I know. Every little detail can make or break the work, but it is always exciting.

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Andrew Starr wrote 10/11/2015 at 09:46 point

Excellent guidelines. Personally, I try and avoid using traces less than 13mil unless I have to for fine pitch components etc. I avoid right angle turns due to a) aesthetics and b) right angle corners can peel away from the PCB substrate easier than say, 45 degree corners can. 

But definitely place your components into functional groups, e.g. switchmode supplies, DAC/ADC subcircuits etc. I generally place connectors first to determine the outline of the board (observing sensible separation between digital and analogue connectors etc), then place my functional groups, as close to their relevant connectors as possible. Also, put in filtering and other EMI/EMC measures at the schematic stage, even if you don't end up populating them later. Easier to add a footprint for an ESD-protecting transorb, or a common-mode choke, at the schematic stage, than try and kludge it in once you're building the PCB!

If it's a complex new design, add low-value resistors in the various power supply sections so you can a) do current measurements for the various circuit sections and b) remove power from sections of the board for tracing that power supply short...

And ALWAYS use a ground plane, and a power plane!! And decouple. DECOUPLE! 1n, 10n on digital supple pins. 100n, 1u near the IC. 10u caps etc sprinkled around the board.

Ok, I'm a bit drunk so I'll stop now.

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LazyHD wrote 10/11/2015 at 18:33 point

Thanks for your input. Good pints. Definitely the mechanical design has its weight on the PCB Layout (Connectors, Switches ....). 
I think 13 mils is bit too conservative. If you have a big number of nets/pads then it will be real hard to finish the routing.

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matseng wrote 07/26/2015 at 17:56 point

"8 mils clearance for traces and 10-15 mils clearance for shapes (copper pours)" Why this constraint?  You mean that it's ok to put signal carrying traces close to each other but they need to be kept  far away from static copper (pours are usually gnd/vcc)....

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K.C. Lee wrote 07/26/2015 at 18:48 point

I think he is a bit too conservative.  My el cheapo Chinese proto PCB place recommends 8/8 rules, but claim they can do 6/6.  Their DRC checks for 6/6. 

For simple boards, I have pushed 6mil track to track.  This is what can happen when I tried 6 mils on fills.  They fixed a short by hand - probably found that on eTest.  That was the only 1 out of the 10 I have ordered.

So now I know better.  I am using 8 mils to trace/fills.  If I need density, I would go 6/6 on traces on proto.  I am used to etching my own boards, so shorted/voids are no big deal to me.

This is my first board there a year ago.  They passed their claim what what they can do.

This is what I have seen this year.  
They have improved on the solder mask, but getting worse on silkscreen.  I am at a point that I have removed silkscreen on small parts and only use it for labelling.

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Andreas wrote 07/26/2015 at 11:12 point

One thing i would add in here is the IPC organization ( and maybe describe roughly what they do, and why industry standards and rules can help you and should be used to get your design right the first time. 

Something else that i kinda missed in your text is the importance of signal speeds, rise times, impedances and stuff like that. Identifying critical signals (like clocks, reset lines,...) early in the design and make them a priority in component placement and signal routing helps a lot to get a reliable design. Especially the rise times of digital signals getting shorter and shorter is something easily overlooked, and i expect more and more problems there with microcontroller clock speeds increasing.

You kinda scratched that topic a little bit, but i think you should elaborate some important parts a bit more. In the EMI chapter, one basic thing you have to keep in mind is that both high immunity and low emission is the key to success and you have to think about that while layouting too. Do i have a signal that is sensitive and needs to be protected, or do i have a line with lots of potential noise that needs to be isolated and removed? Your sentence about the series resistor: "Series resistors should also be placed next to the micro-controller pin that they connect to." can be correct, or completely wrong, depending on the signal. Please change that and try to explain why signal termination is important and maybe show some termination circuits. Once that theory is known, the layouter should understand where exactly (source/sink) and why the terminations have to be placed.

I'll try to give some more inputs and feedbacks along the way later on.

""The layout person asked me about prioritizing which passives should be
the closest to a large chip.  I told him smallest values first.  He
smiled at that."
I smiled at that too !!"

Smiling is nice, but understanding that the lowest capacitor value, combined with the lowest trace impedance and resistive losses gives a much better high frequency blocker, and that the lower frequency signals "care less" about impedance thus allowing the bigger capacitors to be placed futher away goes a long way. ;)

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LazyHD wrote 07/26/2015 at 11:41 point

I think you raise good points. Would you be interested in adding yourself to the project and making the fixes ?! I think you have a bigger knowledge about the parts you wat to add . and you have cid+ I think you will be great addition to this project.

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K.C. Lee wrote 07/26/2015 at 11:51 point

One major issue with IPC standards is that their specs are not free.  So you'll either need to have access to it from work or manage to find the specs somewhere tugged inside a board house's app note or someone's website.  If you do a board layout using a board house's DRC, chances are that they already incorporate some of the IPC's recommendation and the board vendor's tweaks for their process to get good yields.  So that part is actually easy.  It however may not be blessed by the CM assembly house which have to place the components or rework on them or the test requirements.

There are a whole lot of signal integrity topics that can be included, but I doubt the majority of readers would bother with those.  The other thing is that it is a topic that unless you understand completely, giving the usual thumb of rules without understanding the limitations cause more harm than help.  Once you get those "I know Kung Fu" people on youtube, then the rest of the noobs get the wrong info.  I have seen and try to correct way too many cases of people trying to do monkey see monkey do - track matching without a clue what is that they are trying to match against or when to use them.  Yes, it might look cool, but not effective engineering.

BTW when I said it feels like Zen Q&A - meaning that the answer to a complicated question is a simple one.  The layout person is smart and experienced enough to ask that question in the first place.  Trace/via parasitic can contribute a lot more on smaller component values than large ones and hence my answer.   It also applies to resistors (except 0 ohms jumpers etc) /cap.

found this:  for "Zen Q&A"

Story#3 is my point to the "monkey see monkey do" issue.

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LazyHD wrote 07/26/2015 at 12:04 point

That is why I smiled also. A smart simple answer right to the point. I like it :).

IPC is closed that is right, but I think it should be mentioned. Maybe also mentioning CID and CID+ programs for the readers. There is also PCB Library Expert which will calculate footprints based on IPC and it is free. But no love for KiCad nor Linux.

I like these comments, very informative :)

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Andreas wrote 07/26/2015 at 13:01 point

I do agree that access to IPC standards is not in the reach for most of us, but i think even knowing about the ressource and knowing that there is something trying to bridge the gap between digital design and the physical world can be helpful.

And about signal integrity topics, i do understand your point of view too that this field is so broad and complex you simply can not learn it by reading a few chapters in the internet. I think what is important is first and foremost that designers are made aware of the problem. Try to explain the importance and relevance not only for your design to actually work as intended, but also what consequences (emission/immunity) this can have for your design. My idea is not to write "A complete guide to Signal Integrity" but to try and show some of the basics, and try to give an outlook into the richness of the topic and where/when you should probably start to dig deeper into the topic or ask a specialist, before you even start to think about drawing the schematics of your circuit.

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K.C. Lee wrote 07/26/2015 at 13:12 point

Agree on the part: You shouldn't even try to draw schematic until you have done the analysis.  I have added SI mailing list & Dr. Howard Johnson's site to the project detail.

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K.C. Lee wrote 07/26/2015 at 13:23 point

Most HaD reader don't even understand AC analysis, parasitics and the most basic electronics and still stuck playing with breadboard and asking for DIP packages, so the whole complex SI escape their little comfort zone.

No two SI experts can even agree on the topic of decoupling.  You either pick one or the other and don't try to mix them as that will cause more problems that you are trying to solve.  A little knowledge without knowing your own deficiency is a dangerous thing.  So you have the choice of the blue pill or the red pill.  i.e. either go in with the intention of learning all you can and forever change your view of the world or you stay ignorant and be happy.

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K.C. Lee wrote 07/25/2015 at 23:00 point

Two of the almost Zen Q&A moments as people asked me about placement on the spot:
Supplier asked me the orientation large MLCC cap on a module.  I told him that it should be on the use the shorter axis - less flexing/less cracking.
The layout person asked me about prioritizing which passives should be the closest to a large chip.  I told him smallest values first.  He smiled at that.

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LazyHD wrote 07/26/2015 at 00:01 point

"The layout person asked me about prioritizing which passives should be the closest to a large chip.  I told him smallest values first.  He smiled at that."

I smiled at that too !! 

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