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Another set of articles in OpenSilicium

A project log for Recursive Range Reduction (3R) HW&SW CODEC

A high speed circuit design in JS and VHDL for decoding 3R bitstreams, a "quasi-entropy" code that compacts series of correlated numbers.

Yann Guidon / YGDES 01/02/2016 at 12:270 Comments

Publication is progressing, with 2 articles about the coding style and the optimisation of the algorithm (using a linearisation of the recursive system).

16 pages at the end of OpenSilicium n°17 !


More to come, whenever I have time ;)

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