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A project log for Recursive Range Reduction (3R) HW&SW CODEC

A high speed circuit design in JS and VHDL for decoding 3R bitstreams, a "quasi-entropy" code that compacts series of correlated numbers.

yann-guidon-ygdesYann Guidon / YGDES 04/17/2016 at 22:230 Comments

Currently, only one part of the decoder is developped and available. This is a critical part, the innovative algorithm (which linearizes the tree-walking from the recursive definition) which must be connected to the other blocks.

The other blocks are the bit-shuffler/bitfield extractor, and the output filter (which depends on the application).

Of course, the forward and reverse blocks must be designed so this doubles the efforts again !

Let's just look at the decoder: it receives one block of data encoded as a bitstream (with a granularity of 8 bits so blocks are byte-aligned).

The bitstream is examined and words are extracted from the bitstream: from x bits they are zero-extended (usually to 16 bits).

Those words are fed to the tree-walker unit that select which words to bypass or subtract and store for later. In the end, the output words are smaller.

These smaller words, either a difference or a litteral value, are sent to the reconstruction filter.

The encoder is almost the reverse but needs one more step, so this is not a totally symmetric process, and it requires more buffering, one full block must be stored before being sent.

So far the decoder has been tested with manually generated word streams. They can also be copy-pasted from dynamic results of the test page in JavaScript:

The bitstream supports several formats to reduce the impact of incompressible or degenerate incomping data.
In the following, we assume that the input data are N-bits positive numbers, packed in blocks of 2^M.